381 lines
21 KiB
ReStructuredText
381 lines
21 KiB
ReStructuredText
LAN9662
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=======
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Introduction
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------------
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Add description of LAN9662 when datasheet is available.
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For links to Microchip LAN9662 resources see section :ref:`lan9662-resources`.
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Known limitations:
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- One byte write operations are not supported from
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LAN9662 RTE to the I/O FPGA. This means the sample submodule
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Digital Output 1x8 is not working in full rte mode.
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- Submodule default values are not applied on AR teardown
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in full rte mode.
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LAN9662 Profinet Solution
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-------------------------
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P-Net implements support for the networking hardware offload features in the LAN9662.
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When hardware offload is enabled, Profinet cyclic data frames are handled by the LAN9662 Real
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Time Engine (RTE). During AR / connection establishment the RTE is configured by the P-Net stack and
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sending and receiving cyclic data is handed over the RTE. The P-Net stack still handles
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all non-cyclic Profinet frames.
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The cyclic process data is defined by the Profinet device application.
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In Profinet the device input data is sent to the controller using the Producer Protocol Machine (PPM) and
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the output data is received using the the Consumer Protocol Machine (CPM).
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For the PPM side the RTE is configured to read input data sources and build a frame
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that is periodically sent to the controller.
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For the CPM side the RTE is configured to extract output data in received
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frames and write it to configured output sinks.
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The RTE process data can be mapped to SRAM or a QSPI HW device.
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When hardware offload is enabled all process data by default is mapped to SRAM
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by P-Net and the application uses the P-Net API the same way as usual.
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To map the process data to a QSPI interface the application uses the P-Net API functions
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``pnet_mera_input_set_rte_config()`` for input data and
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``pnet_mera_output_set_rte_config()`` for output data.
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When a QSPI data source or sink is configured the process data
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is handled by the configured HW device and not by the application.
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The P-Net stack still keeps a copy of the process data in SRAM
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and the application can read the process data from this copy.
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All P-Net interactions with the LAN9662 RTE is done through the MERA library provided by Microchip.
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Detailed information about the LAN9662 and the RTE can be found in the references in section :ref:`lan9662-resources`.
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Table below shows how the the P-Net API for handling the process data is affected when RTE is enabled.
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+---------------------------------+-----------+------------------------------------------------------+
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| API Function | RTE-SRAM | RTE-QSPI |
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+=================================+===========+======================================================+
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| pnet_input_set_data_and_iops | Supported | Not supported. Input IO data from QSPI. |
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+---------------------------------+-----------+------------------------------------------------------+
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| pnet_input_get_data_and_iops | Supported | Supported |
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+---------------------------------+-----------+------------------------------------------------------+
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| net_input_get_iocs | Supported | Supported |
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+---------------------------------+-----------+------------------------------------------------------+
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| pnet_output_get_data_and_iops | Supported | Supported for reading output IO data mapped to QSPI. |
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+---------------------------------+-----------+------------------------------------------------------+
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| pnet_output_set_iocs | Supported | Supported |
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+---------------------------------+-----------+------------------------------------------------------+
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| pnet_mera_output_set_rte_config | Not used | Used for configuration |
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+---------------------------------+-----------+------------------------------------------------------+
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| pnet_mera_input_set_rte_config | Not used | Used for configuration |
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+---------------------------------+-----------+------------------------------------------------------+
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Build-time configuration
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------------------------
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Support for LAN9962 features in the P-Net stack is enabled using the following CMake options:
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- PNET_OPTION_DRIVER_ENABLE - Enable the P-Net support for hardware drivers in general
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- PNET_OPTION_DRIVER_LAN9662 - Enable the support for the LAN9662 driver
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- PNET_OPTION_LAN9662_SHOW_RTE_INFO - Print the RTE configuration to the application log
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The LAN9662 sample is built with the following P-Net options::
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set(HAS_PNET ON)
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set(BUILD_TESTING OFF)
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set(PNET_OPTION_DRIVER_ENABLE ON)
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set(PNET_OPTION_DRIVER_LAN9662 ON)
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set(PNET_OPTION_LAN9662_SHOW_RTE_INFO OFF)
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set(PNET_MAX_PHYSICAL_PORTS "2" CACHE STRING "LAN9962 2 Ports" FORCE)
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set(PNET_MAX_SLOTS "13" CACHE STRING "LAN9962 sample application" FORCE)
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set(PNET_MAX_SUBSLOTS "4" CACHE STRING "LAN9962 2 Ports" FORCE)
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set(LOG_LEVEL "FATAL" CACHE STRING "Enable logging" FORCE)
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Run-time configuration
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----------------------
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The build-time configuration described in previous section enables the support for the LAN9662 driver.
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The application decides if the hardware offload shall be used when p-net stack is initialized.
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The hardware offload feature is enabled using the driver_enable parameter part of
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the configuration (pnet_cfg_t) passed to P-Net during initialization.
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When set to true, LAN9662 specific CPM and PPM drivers are used in the P-Net stack and handling of cyclic data frames
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is handed off to the LAN9662 RTE during AR establishment.
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The driver_config parameter contains base IDs for various resources in the LAN9662 RTE.
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In a system where P-Net is the only feature using the RTE these don't need to be considered.
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If not, the IDs must be set not to conflict with other parts of the system.
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Input data is mapped to QSPI using the operation ``pnet_input_set_rte_config()``.
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Output data is mapped to QSPI using the operation ``pnet_output_set_rte_config()``.
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EVB-LAN9662
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-----------
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Both the default P-Net sample application and the LAN9662 sample application can be run on the EVB-LAN9662.
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Utility scripts for configuration of LEDs and buttons and starting the applications are provided in the ``p-net/samples/pn_dev_lan9662/`` directory.
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EVB-LAN9662 Features used by P-Net samples:
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- Shell is available on the EVB-LAN9662 USB connector marked ``CONSOLE``. Use 115200 baud, no flow control.
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- The io-fpga is connected to the EVB-LAN9662-Carrier USB connector marked ``FPGA SPI``.
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- Two ethernet ports are supported. Sample scripts show how to configure a network bridge.
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LAN9662 Sample Application
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--------------------------
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The application focus on the process data and its mapping to the RTE.
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The source code is is found in ``/p-net/samples/pn_dev_lan9662/``.
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The sample application builds for and runs on the EVB-LAN9662.
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It supports the following I/O-data:
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============== ======================= =========================================== ============
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[Slot,Subslot] Name Shared memory area FPGA addr [func]
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============== ======================= =========================================== ============
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[1,1] Digital Input 1x8 /dev/shm/pnet-in-1-1-digital_input_1x8 0x100 [mem]
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[2,1] Digital Output 1x8 /dev/shm/pnet-out-2-1-digital_output_1x8 0x104 [mem]
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[3,1] Digital Input 1x64 /dev/shm/pnet-in-3-1-digital_input_1x64 0x108 [mem]
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[4,1] Digital Input 2x32a /dev/shm/pnet-in-4-1-digital_input_2x32_a 0x110 [mem]
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[5,1] Digital Input 2x32b /dev/shm/pnet-in-5-1-digital_input_2x32_b 0x118 [mem]
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[6,1] Digital Input 1x800 /dev/shm/pnet-in-6-1-digital_input_1x800 0x120 [mem]
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[7,1] Digital Output 1x64 /dev/shm/pnet-out-7-1-digital_out_1x64 0x184 [mem]
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[8,1] Digital Output 2x32a /dev/shm/pnet-out-8-1-digital_output_2x32_a 0x18c [mem]
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[9,1] Digital Output 2x32b /dev/shm/pnet-out-9-1-digital_output_2x32_b 0x194 [mem]
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[10,1] Digital Output 1x800 /dev/shm/pnet-out-10-1-digital_output_1x800 0x19c [mem]
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[11,1] Digital Input Port A Not supported 0x200 [gpios]
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[12,1] Digital Output Port A Not supported 0x10 [gpios]
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============== ======================= =========================================== ============
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Note that the I/Os on slots 11 and 12 are available at the EVB-LAN9662 pin lists IN-A and OUT-A.
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The sample application gsdml file is available at ``/p-net/samples/pn_dev_lan9662/``.
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The application has three modes of operation. The mode is a runtime configuration defined by the mode (-m) argument:
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-m none RTE disabled. Application process data mapped to shared memory.
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-m cpu RTE enabled. RTE maps process data to SRAM. Application process data mapped to shared memory.
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-m full RTE enabled. RTE maps process data to QSPI. Application process data mapped to io-fpga.
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**Mode none**
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In this mode the input/output data is mapped to shared memory.
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The shared memory can be accessed using the pn_shm_tool or by another
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application in the system. HW offload is disabled and the default data
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path of the P-Net stack is used.
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The shared memory is accessed using the pn_shm_tool. Run ``/usr/bin/pn_shm_tool -h`` for further details.
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**Mode cpu**
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This mode shows how to use the P-Net with LAN9662 RTE SRAM data.
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Also in this mode the input/output data is mapped to shared memory.
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The shared memory can be accessed using the pn_shm_tool or by another
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application in the system. HW offload is enabled and the cyclic data is
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is handled by the LAN9662 RTE. To a user of the application it is no
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difference to the "none"-mode. However P-Net copies application process
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data to SRAM which is mapped to the cyclic data frames handled by the RTE.
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The shared memory is accessed using the pn_shm_tool. Run ``/usr/bin/pn_shm_tool -h`` for further details.
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**Mode full**
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This mode shows how to use P-Net with LAN9662 RTE QSPI data.
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Shared memory is not used. The input/output data is mapped to
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the IO-FPGA on the EVB-LAN9662.
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The fpga is accessed using the mera-iofpga-rw tool. Run ``mera-iofpga-rw -h`` for further details.
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Note that Port A outputs and Port A inputs can be accessed without the mera-iofpga-rw tool since they are physically available on the EVB-LAN9662.
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Note that the mera-iofpga-rw tool is run on a host system, not on the LAN9662.
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See :ref:`lan9662-resources` for further information on the io-fpga tool.
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Running the LAN9662 Sample Application
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--------------------------------------
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Start the LAN992 sample application using the script ``switchdev-profinet-example.sh``.
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The log from a scenario with a PLC using input port A and output port A is shown below.
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log::
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switchdev-profinet-example.sh
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Starting switchdev-profinet-example
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[ 31.365807] EXT4-fs (mmcblk0p2): recovery complete
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[ 31.371838] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null). Quota mode: disabled.
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ANA_PGID[61] = 0x0000010f -> 0x000001ff
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net.ipv6.conf.br0.disable_ipv6 = 1
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[ 31.647312] lan966x-switch e2000000.switch eth0: PHY [e200413c.mdio-mii:01] driver [Microchip INDY Gigabit Internal] (irq=POLL)
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[ 31.658804] lan966x-switch e2000000.switch eth0: configuring for phy/gmii link mode
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[ 31.786815] 8021q: adding VLAN 0 to HW filter on device eth0
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[ 31.877381] lan966x-switch e2000000.switch eth1: PHY [e200413c.mdio-mii:02] driver [Microchip INDY Gigabit Internal] (irq=POLL)
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[ 31.888861] lan966x-switch e2000000.switch eth1: configuring for phy/gmii link mode
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[ 32.016817] 8021q: adding VLAN 0 to HW filter on device eth1
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[ 32.032693] br0: port 1(eth0) entered blocking state
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[ 32.037722] br0: port 1(eth0) entered disabled state
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[ 32.042987] device eth0 entered promiscuous mode
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[ 32.047909] br0: port 1(eth0) entered blocking state
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[ 32.052820] br0: port 1(eth0) entered forwarding state
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[ 32.068835] br0: port 2(eth1) entered blocking state
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[ 32.073767] br0: port 2(eth1) entered disabled state
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[ 32.079243] device eth1 entered promiscuous mode
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[ 32.084021] br0: port 2(eth1) entered blocking state
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[ 32.088977] br0: port 2(eth1) entered forwarding state
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QSYS_SW_PORT_MODE[4] = 0x00005002 -> 0x00045000
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Starting LAN9662 Profinet sample application
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RTE mode: full
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** Starting P-Net sample application 0.2.0 **
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Number of slots: 13 (incl slot for DAP module)
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P-net log level: 2 (DEBUG=0, FATAL=4)
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App log level: 0 (DEBUG=0, FATAL=4)
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Max number of ports: 2
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Network interfaces: br0,eth0,eth1
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Button1 file:
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Button2 file:
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Default station name: lan9662-dev
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Management port: br0 12:A9:2D:16:93:83
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Physical port [1]: eth0 12:A9:2D:16:93:81
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Physical port [2]: eth1 12:A9:2D:16:93:82
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Hostname: vcoreiii
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IP address: 0.0.0.0
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Netmask: 0.0.0.0
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Gateway: 0.0.0.0
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Storage directory: /tmp/pn_data
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Application RTE mode "full"
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Slot [1,1] Digital Input 1x8 mapped to FPGA address 0x100
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Slot [2,1] Digital Output 1x8 mapped to FPGA address 0x104
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Slot [3,1] Digital Input 1x64 mapped to FPGA address 0x108
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Slot [4,1] Digital Input 2x32 a mapped to FPGA address 0x110
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Slot [5,1] Digital Input 2x32 b mapped to FPGA address 0x118
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Slot [6,1] Digital Input 1x800 mapped to FPGA address 0x120
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Slot [7,1] Digital Output 1x64 mapped to FPGA address 0x184
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Slot [8,1] Digital Output 2x32 a mapped to FPGA address 0x18c
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Slot [9,1] Digital Output 2x32 b mapped to FPGA address 0x194
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Slot [10,1] Digital Output 1x800 mapped to FPGA address 0x19c
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Slot [11,1] Digital Input Port A mapped to FPGA address 0x200
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Slot [12,1] Digital Output Port A mapped to FPGA address 0x10
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Profinet signal LED indication. New state: 0
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LED 2 new state 0
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Network script for br0: Set IP 0.0.0.0 Netmask 0.0.0.0 Gateway 0.0.0.0 Permanent: 1 Hostname: lan9662-dev Skip setting hostname: true
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No valid default gateway given. Skipping setting default gateway.
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LED 1 new state 0
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Plug DAP module and its submodules
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Module plug indication API 0
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[0] Pull old module
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[0] Plug module. Module ID: 0x1 "DAP 1"
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Submodule plug indication API 0
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[0,1] Pull old submodule.
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[0,1] Plug submodule. Submodule ID: 0x1 Data Dir: NO_IO In: 0 Out: 0 "DAP Identity 1"
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Submodule plug indication API 0
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[0,32768] Pull old submodule.
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[0,32768] Plug submodule. Submodule ID: 0x8000 Data Dir: NO_IO In: 0 Out: 0 "DAP Interface 1"
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Submodule plug indication API 0
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[0,32769] Pull old submodule.
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[0,32769] Plug submodule. Submodule ID: 0x8001 Data Dir: NO_IO In: 0 Out: 0 "DAP Port 1"
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Submodule plug indication API 0
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[0,32770] Pull old submodule.
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[0,32770] Plug submodule. Submodule ID: 0x8002 Data Dir: NO_IO In: 0 Out: 0 "DAP Port 2"
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Waiting for PLC connect request
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[ 32.544399] br0: port 1(eth0) entered disabled state
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[ 32.555613] br0: port 2(eth1) entered disabled state
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[ 34.164904] lan966x-switch e2000000.switch eth1: Link is Up - 100Mbps/Full - flow control off
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[ 34.173514] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
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[ 34.179964] br0: port 2(eth1) entered blocking state
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[ 34.184904] br0: port 2(eth1) entered forwarding state
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[ 34.884950] lan966x-switch e2000000.switch eth0: Link is Up - 1Gbps/Full - flow control rx/tx
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[ 34.893743] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
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[ 34.900201] br0: port 1(eth0) entered blocking state
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[ 34.905155] br0: port 1(eth0) entered forwarding state
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[ 37.214719] NOHZ tick-stop error: Non-RCU local softirq work is pending, handler #08!!!
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Network script for br0: Set IP 192.168.0.50 Netmask 255.255.255.0 Gateway 192.168.0.50 Permanent: 0 Hostname: lan9662-dev Skip setting hostname: true
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[ 39.225858] NOHZ tick-stop error: Non-RCU local softirq work is pending, handler #08!!!
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[ 39.235956] NOHZ tick-stop error: Non-RCU local softirq work is pending, handler #08!!!
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Module plug indication API 0
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[11] Pull old module
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[11] Plug module. Module ID: 0x100b "DI Port A"
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Submodule plug indication API 0
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[11,1] Pull old submodule.
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[11,1] Plug submodule. Submodule ID: 0x200b Data Dir: INPUT In: 4 Out: 0 "Digital Input Port A"
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[11,1,"Digital Input Port A"] Set RTE QSPI address 0x200
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Module plug indication API 0
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[12] Pull old module
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[12] Plug module. Module ID: 0x100c "DO Port A"
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Submodule plug indication API 0
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[12,1] Pull old submodule.
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[12,1] Plug submodule. Submodule ID: 0x200c Data Dir: OUTPUT In: 0 Out: 4 "Digital Output Port A"
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[12,1,"Digital Output Port A"] Set RTE QSPI address 0x10
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PLC connect indication. AREP: 1
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ANA_RT_VLAN_PCP[1].PCP_MASK = 0x00000000 -> 0x000000ff
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ANA_RT_VLAN_PCP[1].VLAN_ID = 0x00000000 -> 0x00000000
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ANA_RT_VLAN_PCP[1].VLAN_PCP_ENA = 0x00000000 -> 0x00000001
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vcap add is1 10 3 s1_rt first 0 rt_vlan_idx 1 0x7 l2_mac 12:A9:2D:16:93:83 ff:ff:ff:ff:ff:ff rt_type 1 0x3 rt_frmid 32769 0xffff s1_rt rtp_id 5 fwd_ena 1 fwd_mas0
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key field first: value: 0
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key field rt_vlan_idx: value: 01 mask: 07
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key field l2_mac: value: 8393162da912 mask: ffffffffffff
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key field rt_type: value: 01[ 39.549942] NOHZ tick-stop error: Non-RCU local softirq work is pending, handler #08!!!
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mask: 03
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key field rt_frmid: value: 00008001 mask: 0000ffff
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act field rtp_id: val[ 39.565901] NOHZ tick-stop error: Non-RCU local softirq work is pending, handler #08!!!
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ue: 0x5
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act field fwd_ena: value: 0x1
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act field fwd_mask: value: 0x10
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Event indication PNET_EVENT_STARTUP AREP: 1
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PLC dcontrol message. AREP: 1 Command: PRM_END
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Event indication PNET_EVENT_PRMEND AREP: 1
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[0,1,"DAP Identity 1"] Set input data and IOPS. Size: 0 IOPS: GOOD
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[0,32768,"DAP Interface 1"] Set input data and IOPS. Size: 0 IOPS: GOOD
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[0,32769,"DAP Port 1"] Set input data and IOPS. Size: 0 IOPS: GOOD
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[0,32770,"DAP Port 2"] Set input data and IOPS. Size: 0 IOPS: GOOD
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[11,1,"Digital Input Port A"] Set input data and IOPS. Size: 4 IOPS: GOOD
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[12,1,"Digital Output Port A"] Set output IOCS: GOOD
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vcap add is1 10 2 s1_rt first 0 l2_mac 12:A9:2D:16:93:83 ff:ff:ff:ff:ff:ff rt_vlan_idx 0 0x7 rt_frmid 32768 0xffff s1_rt rtp_id 4 rtp_subid 0 rte_inb_upd 1 fwd_e0
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key field first: value: 0
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key field l2_mac: value: 8393162da912 mask: ffffffffffff
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key field rt_vlan_idx: value: 00 mask: 07
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key field rt_frmid: value: 00008000 mask: 0000ffff
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act field rtp_id: value: 0x4
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act field rtp_subid: value: 0x0
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act field rte_inb_upd: value: 0x1
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act field fwd_ena: value: 0x1
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act field fwd_mask: value: 0x10
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[11,1,"Digital Input Port A"] PLC reports Consumer Status (IOCS) GOOD
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Application will signal that it is ready for data, for AREP 1.
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Event indication PNET_EV[ 39.883951] NOHZ tick-stop error: Non-RCU local softirq work is pending, handler #08!!!
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ENT_APPLRDY AREP: 1
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Event indication PNET_EVENT_DATA AREP: 1
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Cyclic data transmission started
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PLC ccontrol message confirmation. AREP: 1 Status codes: 0 0 0 0
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[12,1,"Digital Output Port A"] PLC reports Provider Status (IOPS) GOOD
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Building the LAN9662 Sample Application
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---------------------------------------
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Add step by step guide describing how to build the LAN9662
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sample application and which Microchip resources to download
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when that information is available.
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P-Net on LAN9962 Application Summary
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------------------------------------
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- To map process data to QSPI the application must use the operations ``pnet_output_set_rte_config()`` and ``pnet_input_set_rte_config()``
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- If process data is handled by the application and not mapped to QSPI the hardware offload can be enabled and used without any change in the application. API usage is identical except that the hardware offload is enabled during stack initialization.
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- ``p-net/samples/pn_dev_lan9662/switchdev-profinet-example.sh`` shows the required systems configurations for a 2 port Profinet device application.
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.. _lan9662-resources:
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LAN9662 Resources
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-----------------
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Microchip provides pre-built buildroot images for the LAN9662 which is used
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to run the Profinet sample application:
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- http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/index.html?prefix=public_root/
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To build the Profinet sample application the following bsp and toolchain are used:
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- http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/bsp/mscc-brsdk-arm-2021.09.tar.gz
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- http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/toolchain/mscc-toolchain-bin-2021.02-090.tar.gz
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Documentation and data sheets:
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- http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/bsp/mscc-brsdk-doc-2021.09.html
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- Add more documents when LAN9662 documentation is available.
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