663 lines
26 KiB
C
663 lines
26 KiB
C
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/**************************************************************************************
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*
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* Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved.
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*
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* Description: This plugin library can be used to initialize and use a spidev as a "common"
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* cifX device. The access is based on the cifX toolkit's 'HW-access' functions.
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*
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* Changes:
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*
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* Version Date Author Description
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* ----------------------------------------------------------------------------------
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* 1 02.01.24 SD changed licensing terms
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*
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**************************************************************************************/
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#include <stdlib.h>
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#include <unistd.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <dirent.h>
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#include <sys/ioctl.h>
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#include <linux/spi/spidev.h>
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#include <errno.h>
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#include <pthread.h>
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#include "cifxlinux.h"
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/******************************************************************************/
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/*** GLOBAL DEFINITIONS *******************************************************/
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/******************************************************************************/
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#if defined(VERBOSE) || defined(DEBUG)
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#define DBG(fmt, ...) printf(fmt, ##__VA_ARGS__)
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#else
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#define DBG(fmt, ...)
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#endif
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#define CHECK_STATE /* enable error message in case of dpm status changes to != 0x11 (printed to stderr) */
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/******************************************************************************/
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/*** STRUCTURE DEFINITIONS ****************************************************/
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/******************************************************************************/
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/* states of the SPI interface */
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typedef enum ESPI_IF_STATE_E {
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eNotInitialized,
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eInitialized,
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} ESPI_IF_STATE;
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/* Example structure containing information of the SPI interface (passed as user parameter -> see tSPIDev.userparam) */
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struct SPI_PARAM_T {
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char szName[256]; /* Name of the SPI interface (e.g. /dev/spidev1.0) */
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int iSPIFD; /* File desc of the SPI interface */
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void* pvSerDPMLock; /* lock required to synchronize SPI access */
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int iError; /* Error status of SPI interface */
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ESPI_IF_STATE eState; /* Current interface status */
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/* The following parameter are related to the linux kernel 'spidev' interface */
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uint32_t ulUDelay; /* SPI param: If nonzero, how long to delay after the last bit transfer */
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/* before optionally deselecting the device before the next transfer */
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uint32_t ulSpeed; /* SPI param: see SPI_IOC_RD_MAX_SPEED_HZ, SPI_IOC_WR_MAX_SPEED_HZ */
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uint8_t bBits; /* SPI param: see SPI_IOC_RD_BITS_PER_WORD, SPI_IOC_WR_BITS_PER_WORD */
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uint8_t bMode; /* SPI param: see SPI_IOC_RD_MODE, SPI_IOC_WR_MODE */
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uint8_t* pabTXBuffer;
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uint8_t* pabRXBuffer;
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uint32_t ulChunkSize;
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uint8_t bCSChange;
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};
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/* Internal structures required for read/write transactions */
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/* SPI Read Transfer Structure */
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struct SPI_RD_MSG_T {
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uint8_t abSPIHeader[4];
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uint8_t abData[1];
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};
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/* SPI Write Transfer Structure */
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struct SPI_WR_MSG_T {
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uint8_t abSPIHeader[3];
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uint8_t abData[1];
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};
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/******************************************************************************/
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/*** Global variables *********************************************************/
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/******************************************************************************/
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#define DEFAULT_BUFFER_SIZE (8*1024)
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/*****************************************************************************/
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/*! Create a lock
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* \return Lock Handle */
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/*****************************************************************************/
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static void* CreateLock(void) {
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pthread_mutexattr_t mta;
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pthread_mutex_t *mutex;
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int iRet;
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pthread_mutexattr_init(&mta);
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if( (iRet = pthread_mutexattr_settype(&mta, PTHREAD_MUTEX_RECURSIVE)) != 0 )
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return NULL;
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mutex = malloc( sizeof(pthread_mutex_t) );
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if( mutex == NULL )
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return NULL;
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if( (iRet = pthread_mutex_init(mutex, &mta)) != 0 )
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goto err_out;
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return mutex;
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err_out:
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free(mutex);
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return NULL;
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}
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/*****************************************************************************/
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/*! Acquire a lock
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* \param pvLock Handle to lock */
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/*****************************************************************************/
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static void EnterLock(void* pvLock) {
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pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock;
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int iRet;
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if( (iRet = pthread_mutex_lock(mutex)) != 0)
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{
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fprintf( stderr, "Locking failed: %s\n", strerror(iRet));
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}
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}
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/*****************************************************************************/
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/*! Release a lock
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* \param pvLock Handle to lock */
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/*****************************************************************************/
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static void LeaveLock(void* pvLock) {
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pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock;
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int iRet;
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if( (iRet = pthread_mutex_unlock(mutex)) != 0)
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{
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fprintf( stderr, "Unlock failed: %s\n", strerror(iRet));
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}
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}
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/*****************************************************************************/
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/*! Delete a lock
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* \param pvLock Handle to lock */
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/*****************************************************************************/
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static void DeleteLock(void* pvLock) {
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pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock;
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pthread_mutex_destroy(mutex);
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free(mutex);
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}
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/******************************************************************************/
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/*! Helper function, transfers SPI message.
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* \param ptSPIParam Pointer to interface specific parameter
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* \param pbData Pointer to SPI message
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* \param pbData length of SPI message
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* \param fCSChange */
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/******************************************************************************/
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static int SPITransferMessage(struct SPI_PARAM_T* ptSPIParam, uint8_t *pbData, uint32_t ulLen, uint8_t fCSChange)
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{
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int ret = 0;
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struct spi_ioc_transfer tSPITransfer = {0};
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DBG("++SPITransferMessage\n");
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tSPITransfer.tx_buf = (uint64_t)pbData;
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tSPITransfer.rx_buf = (uint64_t)pbData;
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tSPITransfer.len = ulLen;
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tSPITransfer.cs_change = fCSChange;
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if(0 > (ret = ioctl( ptSPIParam->iSPIFD, SPI_IOC_MESSAGE(1), &tSPITransfer)))
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fprintf(stderr, "SPITransferMessage: Failed to transfer message on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
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#ifdef CHECK_STATE
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if (0x11 != pbData[0]) {
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ret = -EAGAIN;
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fprintf(stderr, "DPM status changed 0x%X (OK => 0x11)!\n", pbData[0]);
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}
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#endif
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DBG("--SPITransferMessage\n");
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return ret;
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}
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/******************************************************************************/
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/*! Helper function, reading data via SPI interface.
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* Translate read request into SPI read message.
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* \param ptSPIParam Pointer to interface specific parameter
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* \param ulDpmAddr Address offset in DPM to read data from
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* \param pbData Pointer to Buffer to store read data
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* \param ulLen Number of bytes to read */
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/******************************************************************************/
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static void SPIReadChunk( struct SPI_PARAM_T* ptSPIParam, uint32_t ulDpmAddr, uint8_t *pbData, uint32_t ulLen)
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{
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struct SPI_RD_MSG_T* ptSPIRDMsg = NULL;
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int ret = 0;
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DBG("++SPIReadChunk\n");
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/* Check buffer size */
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if(*(uint16_t*)ptSPIParam->pabRXBuffer < ulLen) {
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fprintf(stderr, "SPIReadChunk: RX SPI buffer is too small\n");
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return;
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}
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ptSPIRDMsg = (struct SPI_RD_MSG_T*)(ptSPIParam->pabRXBuffer+sizeof(uint16_t));
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/* prepare SPI message */
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ptSPIRDMsg->abSPIHeader[0] = 0x80 + (uint8_t)((ulDpmAddr >> 16) & 0x0F);
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ptSPIRDMsg->abSPIHeader[1] = (uint8_t)((ulDpmAddr >> 8) & 0xFF);
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ptSPIRDMsg->abSPIHeader[2] = (uint8_t)((ulDpmAddr) & 0xFF);
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ptSPIRDMsg->abSPIHeader[3] = 0x00;
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/* transfer message */
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ret = SPITransferMessage(ptSPIParam, (uint8_t*)ptSPIRDMsg, ulLen+4, ptSPIParam->bCSChange);
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#ifdef CHECK_STATE
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if (0>ret) {
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fprintf(stderr, "Error SPIReadChunk: DPM Addr=0x%X / Len=0x%X\n", ulDpmAddr, ulLen) ;
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}
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#endif
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/* return read data */
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memcpy(pbData, ptSPIRDMsg->abData, ulLen);
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DBG("--SPIReadChunk\n");
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}
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/******************************************************************************/
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/*! Helper function, writing data via SPI interface
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* Translate write request into SPI write message
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* \param ptSPIParam Pointer to interface specific parameter
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* \param ulDpmAddr Offset in DPM where data to write to
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* \param pbData Pointer to Buffer pointing to write data
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* \param ulLen Number of bytes to write */
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/******************************************************************************/
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static void SPIWriteChunk(struct SPI_PARAM_T* ptSPIParam, uint32_t ulDpmAddr, uint8_t *pbData, uint32_t ulLen)
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{
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struct SPI_WR_MSG_T* ptSPIWRMsg = NULL;
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int ret = 0;
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DBG("++SPIWriteChunk\n");
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/* Check buffer size */
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if(*(uint16_t*)ptSPIParam->pabTXBuffer < ulLen) {
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fprintf(stderr, "SPIWriteChunk: TX SPI buffer is too small\n");
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return;
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}
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ptSPIWRMsg = (struct SPI_WR_MSG_T*)(ptSPIParam->pabTXBuffer+sizeof(uint16_t));
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/* prepare SPI message */
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ptSPIWRMsg->abSPIHeader[0] = (uint8_t)((ulDpmAddr >> 16) & 0x0F);
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ptSPIWRMsg->abSPIHeader[1] = (uint8_t)((ulDpmAddr >> 8) & 0xFF);
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ptSPIWRMsg->abSPIHeader[2] = (uint8_t)((ulDpmAddr) & 0xFF);
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memcpy(ptSPIWRMsg->abData, pbData, ulLen);
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/* transfer message */
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ret = SPITransferMessage(ptSPIParam, (uint8_t*)ptSPIWRMsg, ulLen+3, ptSPIParam->bCSChange);
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#ifdef CHECK_STATE
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if (0>ret) {
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fprintf(stderr, "Error SPIWriteChunk: DPM Addr=0x%X / Len=0x%X\n", ulDpmAddr, ulLen) ;
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}
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#endif
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DBG("--SPIWriteChunk\n");
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}
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/******************************************************************************/
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/*! Read a number of bytes via the custom hardware interface function
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* \param ptDevice Pointer to the custom device
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* \param pvDpmAddr Address offset in DPM to read data from
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* \param pvDst Buffer to store read data
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* \param ulLen Number of bytes to read */
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/******************************************************************************/
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static void* SPIHWIFRead(struct CIFX_DEVICE_T* ptDevice, void* pvDpmAddr, void* pvDst, uint32_t ulLen)
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{
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struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam;
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DBG("++SPIHWIFRead\n");
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/* check if interface is correctly configured */
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if ((NULL != ptSPIParam) && (ptSPIParam->eState == eInitialized)) {
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/* enter SPI access lock */
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EnterLock(ptSPIParam->pvSerDPMLock);
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/* read data from DPM */
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SPIReadChunk(ptSPIParam, (uint32_t)(uintptr_t)pvDpmAddr, (uint8_t*)pvDst, ulLen);
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LeaveLock(ptSPIParam->pvSerDPMLock);
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}
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DBG("--SPIHWIFRead\n");
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return pvDst;
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}
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static void* SPIHWIFRead_ext(struct CIFX_DEVICE_T* ptDevice, void* pvDpmAddr, void* pvDst, uint32_t ulLen)
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{
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struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam;
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int reads = ulLen/ptSPIParam->ulChunkSize;
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void* ret = NULL;
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while(reads>0) {
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ret = SPIHWIFRead(ptDevice,pvDpmAddr,pvDst,ptSPIParam->ulChunkSize);
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pvDpmAddr = (void*)((uintptr_t)pvDpmAddr + ptSPIParam->ulChunkSize);
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pvDst = (void*)((uintptr_t)pvDst + ptSPIParam->ulChunkSize);
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reads--;
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}
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if (ulLen%ptSPIParam->ulChunkSize)
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ret = SPIHWIFRead(ptDevice,pvDpmAddr,pvDst,ulLen%ptSPIParam->ulChunkSize);
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return ret;
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}
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/******************************************************************************/
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/*! Read a number of bytes via the custom hardware interface function
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* \param ptDevice Pointer to the custom device
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* \param pvDpmAddr Address offset in DPM to write data to
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* \param pvSrc Buffer to data to be written
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* \param ulLen Number of bytes to writ */
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/******************************************************************************/
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static void* SPIHWIFWrite(struct CIFX_DEVICE_T* ptDevice, void* pvDpmAddr, void* pvSrc, uint32_t ulLen)
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{
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struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam;
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DBG("++SPIHWIFWrite\n");
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/* check if interface is correctly configured */
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if ((NULL != ptSPIParam) && (ptSPIParam->eState == eInitialized)) {
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/* enter SPI access lock */
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EnterLock(ptSPIParam->pvSerDPMLock);
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/* write data to DPM */
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SPIWriteChunk(ptSPIParam, (uint32_t)(uintptr_t)pvDpmAddr, (uint8_t*)pvSrc, ulLen);
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LeaveLock(ptSPIParam->pvSerDPMLock);
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}
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DBG("--SPIHWIFWrite\n");
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return pvDpmAddr;
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}
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/* */
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static void* SPIHWIFWrite_ext(struct CIFX_DEVICE_T* ptDevice, void* pvDpmAddr, void* pvSrc, uint32_t ulLen)
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{
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struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam;
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int writes = ulLen/ptSPIParam->ulChunkSize;
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void* ret = NULL;
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while(writes>0) {
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ret = SPIHWIFWrite(ptDevice,pvDpmAddr,pvSrc,ptSPIParam->ulChunkSize);
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|
|
pvDpmAddr = (void*)((uintptr_t)pvDpmAddr + ptSPIParam->ulChunkSize);
|
||
|
|
pvSrc = (void*)((uintptr_t)pvSrc + ptSPIParam->ulChunkSize);
|
||
|
|
writes--;
|
||
|
|
}
|
||
|
|
if (ulLen%ptSPIParam->ulChunkSize)
|
||
|
|
ret = SPIHWIFWrite(ptDevice,pvDpmAddr,pvSrc,ulLen%ptSPIParam->ulChunkSize);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************/
|
||
|
|
/*! De-initializes SPI interface of device pointed by ptDevice.
|
||
|
|
* \param ptDevice Pointer to the custom device */
|
||
|
|
/******************************************************************************/
|
||
|
|
static void SPIHWIFDeInit(struct CIFX_DEVICE_T* ptDevice)
|
||
|
|
{
|
||
|
|
struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam;
|
||
|
|
|
||
|
|
DBG("++SPIHWIFDeInit\n");
|
||
|
|
if(ptSPIParam->pvSerDPMLock) {
|
||
|
|
DeleteLock(ptSPIParam->pvSerDPMLock);
|
||
|
|
ptSPIParam->pvSerDPMLock = NULL;
|
||
|
|
}
|
||
|
|
close(ptSPIParam->iSPIFD);
|
||
|
|
|
||
|
|
ptSPIParam->eState = eNotInitialized;
|
||
|
|
DBG("--SPIHWIFDeInit\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
int32_t DoDummyRead( struct SPI_PARAM_T* ptSPIParam)
|
||
|
|
{
|
||
|
|
struct spi_ioc_transfer tSPITransfer = {0};
|
||
|
|
uint8_t abData[8] = {0};
|
||
|
|
uint8_t bRetry = 0;
|
||
|
|
int32_t lRet = 0;
|
||
|
|
|
||
|
|
/* Do dummy read (required on netX51) */
|
||
|
|
tSPITransfer.tx_buf = (unsigned long)abData;
|
||
|
|
tSPITransfer.rx_buf = (unsigned long)abData;
|
||
|
|
tSPITransfer.len = sizeof(abData);
|
||
|
|
tSPITransfer.cs_change = ptSPIParam->bCSChange;
|
||
|
|
|
||
|
|
do {
|
||
|
|
memset(abData, 0, sizeof(abData));
|
||
|
|
abData[0] = 0x80; /* set read request, cmd, A19:16 */
|
||
|
|
abData[1] = 0xff; /* A15:8 */
|
||
|
|
abData[2] = 0xfc; /* A7:0 */
|
||
|
|
abData[3] = 0; /* length */
|
||
|
|
|
||
|
|
/* issue dummy transfer */
|
||
|
|
if(0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_MESSAGE(1), &tSPITransfer))) {
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to send message on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
|
||
|
|
ptSPIParam->iError = errno;
|
||
|
|
} else {
|
||
|
|
if(bRetry == 0) {
|
||
|
|
/* skip first result since this is not valid on netX51 */
|
||
|
|
DBG("SPI dummy read: Header(0x%02x 0x%02x 0x%02x 0x%02x) Data(0x%02x%02x%02x%02x)\n"
|
||
|
|
, abData[0], abData[1], abData[2], abData[3], abData[4], abData[5],abData[6], abData[7]);
|
||
|
|
}
|
||
|
|
else if(bRetry == 1) {
|
||
|
|
DBG("SPI read access: Header(0x%02x 0x%02x 0x%02x 0x%02x) Data(0x%02x%02x%02x%02x)\n"
|
||
|
|
, abData[0], abData[1], abData[2], abData[3], abData[4], abData[5],abData[6], abData[7]);
|
||
|
|
/* check if DPM is in the correct status (serial DPM enabled and unlocked) */
|
||
|
|
if(abData[0] != 0x11) {
|
||
|
|
lRet = CIFX_FUNCTION_FAILED;
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to read from serial DPM. Incorrect DPM status of SPI device '%s' (0x%X).\n", ptSPIParam->szName, abData[0]);
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Check the SPI connection and the serial DPM configuration of the device connected on '%s'.\n", ptSPIParam->szName);
|
||
|
|
} else {
|
||
|
|
ptSPIParam->ulUDelay = 0;
|
||
|
|
ptSPIParam->eState = eInitialized;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
bRetry++;
|
||
|
|
}
|
||
|
|
} while(0 <= lRet);
|
||
|
|
|
||
|
|
return lRet;
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************/
|
||
|
|
/*! Initializes SPI interface of device pointed by ptDevice.
|
||
|
|
* \param ptDevice Pointer to the custom device */
|
||
|
|
/******************************************************************************/
|
||
|
|
static int32_t SPIHWIFInit(struct CIFX_DEVICE_T* ptDevice)
|
||
|
|
{
|
||
|
|
int32_t lRet = 0;
|
||
|
|
struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam;
|
||
|
|
|
||
|
|
DBG("++SPIHWIFInit\n");
|
||
|
|
|
||
|
|
if (NULL == ptSPIParam) {
|
||
|
|
fprintf(stderr, "SPIHWIFInit: Invalid initialization parameter for SPI device '%s'\n", ptSPIParam->szName);
|
||
|
|
DBG("--SPIHWIFInit\n");
|
||
|
|
return CIFX_INVALID_PARAMETER;
|
||
|
|
}
|
||
|
|
|
||
|
|
DBG("SPIHWIFInit: SPI Setup: %s, mode %d, %d bits/w, %d Hz\n",ptSPIParam->szName, ptSPIParam->bMode, ptSPIParam->bBits, ptSPIParam->ulSpeed);
|
||
|
|
|
||
|
|
if (0 > (ptSPIParam->iSPIFD = open(ptSPIParam->szName, O_RDWR))) {
|
||
|
|
ptSPIParam->iError = errno;
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to open SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
|
||
|
|
DBG("--SPIHWIFInit\n");
|
||
|
|
return CIFX_FILE_OPEN_FAILED;
|
||
|
|
|
||
|
|
} else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_WR_MODE, &ptSPIParam->bMode))) {
|
||
|
|
ptSPIParam->iError = errno;
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_WR_MODE' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
|
||
|
|
|
||
|
|
} else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_RD_MODE, &ptSPIParam->bMode))) {
|
||
|
|
ptSPIParam->iError = errno;
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_RD_MODE' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
|
||
|
|
|
||
|
|
} else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_WR_BITS_PER_WORD, &ptSPIParam->bBits))) {
|
||
|
|
ptSPIParam->iError = errno;
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_WR_BITS_PER_WORD' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
|
||
|
|
|
||
|
|
} else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_RD_BITS_PER_WORD, &ptSPIParam->bBits))) {
|
||
|
|
ptSPIParam->iError = errno;
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_RD_BITS_PER_WORD' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
|
||
|
|
|
||
|
|
} else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_WR_MAX_SPEED_HZ, &ptSPIParam->ulSpeed))) {
|
||
|
|
ptSPIParam->iError = errno;
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_WR_MAX_SPEED_HZ' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
|
||
|
|
|
||
|
|
} else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_RD_MAX_SPEED_HZ, &ptSPIParam->ulSpeed))) {
|
||
|
|
ptSPIParam->iError = errno;
|
||
|
|
fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_RD_MAX_SPEED_HZ' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno));
|
||
|
|
|
||
|
|
} else {/* successfuly initialized SPI interface */
|
||
|
|
/* create SPI access lock */
|
||
|
|
if (NULL != (ptSPIParam->pvSerDPMLock = (void*)CreateLock())) {
|
||
|
|
/* Do dummy read (required on netX51) */
|
||
|
|
lRet = DoDummyRead(ptSPIParam);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if(0 > lRet)
|
||
|
|
SPIHWIFDeInit(ptDevice);
|
||
|
|
|
||
|
|
DBG("--SPIHWIFInit\n");
|
||
|
|
|
||
|
|
if(0 > lRet) {
|
||
|
|
return CIFX_FUNCTION_FAILED;
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
ptSPIParam->iError = 0;
|
||
|
|
return CIFX_NO_ERROR;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void StatusCB(struct CIFX_DEVICE_T* ptDevice, CIFX_NOTIFY_E eEvent)
|
||
|
|
{
|
||
|
|
struct SPI_PARAM_T* ptSPIParam = ptDevice->userparam;
|
||
|
|
|
||
|
|
if (eCIFX_EVENT_POSTRESET == eEvent) {
|
||
|
|
/* we have to do a dummy read since netX device was reset */
|
||
|
|
DoDummyRead(ptSPIParam);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void SDPMDeInit(struct CIFX_DEVICE_T* ptDevice)
|
||
|
|
{
|
||
|
|
struct SPI_PARAM_T* ptSPIParam = ptDevice->userparam;
|
||
|
|
|
||
|
|
free(ptSPIParam->pabTXBuffer);
|
||
|
|
free(ptSPIParam->pabRXBuffer);
|
||
|
|
free(ptSPIParam);
|
||
|
|
free(ptDevice);
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************/
|
||
|
|
/*! Initializes a cifX device for SDPM (usage of SPI).
|
||
|
|
* \param pszSPIDevice Name of spidev device file (optional)
|
||
|
|
* \param bMode SPI mode
|
||
|
|
* \param bBits Bits per SPI word
|
||
|
|
* \param ulFrequency SPI frequency
|
||
|
|
* \param pszIRQFile Name of IRQ trigger file (optional)
|
||
|
|
* \return Pointer to initialized cifX device on success
|
||
|
|
* NULL on error */
|
||
|
|
/******************************************************************************/
|
||
|
|
struct CIFX_DEVICE_T* SDPMInit(uint8_t *pszSPIDevice, uint8_t bMode, uint8_t bBits, uint32_t ulFrequency, uint8_t *pszIRQFile, uint32_t ulChunkSize, uint8_t bCSChange)
|
||
|
|
{
|
||
|
|
struct CIFX_DEVICE_T* ptSPIDev = NULL;
|
||
|
|
struct SPI_PARAM_T* ptSPIParam = NULL;
|
||
|
|
uint8_t szSPIDevice[261];
|
||
|
|
int32_t lFd;
|
||
|
|
|
||
|
|
DBG("++SDPMInit\n");
|
||
|
|
|
||
|
|
DBG("Running SPI plugin on \"%s\" (mode=%d,bits=%d,freq=%u,chunk=%d,cs-change=%d)!\n", pszSPIDevice, bMode, bBits, ulFrequency, ulChunkSize, bCSChange);
|
||
|
|
|
||
|
|
/* Allocate memory for the cifX device */
|
||
|
|
ptSPIDev = calloc( 1, sizeof(*ptSPIDev));
|
||
|
|
if(ptSPIDev == NULL) {
|
||
|
|
fprintf(stderr, "SDPMInit: Allocate memory for the cifX device\n");
|
||
|
|
goto error_out;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Allocate zero initialized memory for the SPI device */
|
||
|
|
ptSPIParam = calloc(1, sizeof(*ptSPIParam));
|
||
|
|
if(ptSPIParam == NULL) {
|
||
|
|
fprintf(stderr, "SDPMInit: Allocate memory for SPI parameters\n");
|
||
|
|
goto error_out;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check for a valid SPI device */
|
||
|
|
if(pszSPIDevice == NULL) {
|
||
|
|
struct dirent* entry;
|
||
|
|
DIR* dir = opendir("/sys/class/spidev");
|
||
|
|
|
||
|
|
if(NULL != dir) {
|
||
|
|
while((entry = readdir(dir)) != NULL) {
|
||
|
|
if((0 == strncmp(entry->d_name, "spidev", 6))) {
|
||
|
|
snprintf(szSPIDevice, sizeof(szSPIDevice), "/dev/%s", entry->d_name);
|
||
|
|
pszSPIDevice = szSPIDevice;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
lFd = open(pszSPIDevice, O_RDWR);
|
||
|
|
if (lFd < 0) {
|
||
|
|
fprintf(stderr, "SDPMInit: Invalid or missing SPI device(%s)\n", pszSPIDevice);
|
||
|
|
goto error_out;
|
||
|
|
}
|
||
|
|
close(lFd);
|
||
|
|
|
||
|
|
/* Check for a valid SPI mode */
|
||
|
|
if((bMode < SPI_MODE_0) || (SPI_MODE_3 < bMode)) {
|
||
|
|
fprintf(stderr, "SDPMInit: Invalid SPI mode (%d <= x <= %u)\n", SPI_MODE_0, SPI_MODE_3);
|
||
|
|
goto error_out;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check for a valid IRQ file (optional) */
|
||
|
|
lFd = -1;
|
||
|
|
if(pszIRQFile != NULL) {
|
||
|
|
lFd = open(pszIRQFile, O_RDWR|O_NONBLOCK);
|
||
|
|
if(lFd < 0) {
|
||
|
|
fprintf(stderr, "SDPMInit: Invalid SPI IRQ file (%s). Fallback to polling!\n", pszIRQFile);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Configure the SPI device parameter */
|
||
|
|
strncpy(ptSPIParam->szName, pszSPIDevice, sizeof(ptSPIParam->szName));
|
||
|
|
ptSPIParam->ulUDelay = 0;
|
||
|
|
ptSPIParam->bMode = bMode;
|
||
|
|
ptSPIParam->bBits = bBits;
|
||
|
|
ptSPIParam->ulSpeed = ulFrequency;
|
||
|
|
ptSPIParam->ulChunkSize = ulChunkSize;
|
||
|
|
ptSPIParam->bCSChange = bCSChange;
|
||
|
|
|
||
|
|
/* Configuration of a SPI device */
|
||
|
|
ptSPIDev->dpm = NULL; /*!< set to 'NULL' since the SPI device is not memory mapped */
|
||
|
|
ptSPIDev->dpmaddr = 0x0; /*!< set to '0x00' since there is no direct address to the physical DPM */
|
||
|
|
ptSPIDev->dpmlen = 0x10000; /*!< set to length of dpm (depends on the device) */
|
||
|
|
|
||
|
|
/* Since device is not a uio device and no pci card invalidate all parameter */
|
||
|
|
ptSPIDev->uio_num = -1; /*!< set to '-1' since it is no 'uio-devices' */
|
||
|
|
ptSPIDev->uio_fd = (lFd >= 0) ? lFd : -1; /*!< set to '-1' since it is no 'uio-devices' */
|
||
|
|
ptSPIDev->pci_card = 0; /*!< set to 0 since it is no pci card */
|
||
|
|
ptSPIDev->force_ram = 0; /*!< Force usage of RAM instead of flash. Card will always be reset and all
|
||
|
|
files are downloaded again (0 => autodetect) */
|
||
|
|
|
||
|
|
/* In this example we are not interrested in any configuration state, so set parameter to NULL */
|
||
|
|
ptSPIDev->notify = StatusCB; /*!< Function to call, after the card has passed several stages (usually needed on RAM based
|
||
|
|
devices, that change DPM configuration during initialization) */
|
||
|
|
/* Append any custom parameter */
|
||
|
|
ptSPIDev->userparam = ptSPIParam; /*!< Use this parameter to pass SPI interface specific information */
|
||
|
|
|
||
|
|
/* There is no extra memory */
|
||
|
|
ptSPIDev->extmem = NULL; /*!< virtual pointer to extended memory */
|
||
|
|
ptSPIDev->extmemaddr = 0x00; /*!< physical address to extended memory */
|
||
|
|
ptSPIDev->extmemlen = 0; /*!< Length of extended memory in bytes */
|
||
|
|
|
||
|
|
/* NOTE: The following parameter are SPI specific */
|
||
|
|
|
||
|
|
/* Hardware access functions, required to read or write to the hardware */
|
||
|
|
ptSPIDev->hwif_init = SPIHWIFInit; /*!< Function initializes SPI hw-function interface (need to be implemented) */
|
||
|
|
ptSPIDev->hwif_deinit = SPIHWIFDeInit; /*!< Function de-initializes SPI hw-function interface (need to be implemented) */
|
||
|
|
if (0 != ptSPIParam->ulChunkSize) {
|
||
|
|
ptSPIDev->hwif_read = SPIHWIFRead_ext; /*!< Function realize DPM read access via SPI transfers (need to be implemented) */
|
||
|
|
ptSPIDev->hwif_write = SPIHWIFWrite_ext; /*!< Function realize DPM write access via SPI transfers (need to be implemented) */
|
||
|
|
} else {
|
||
|
|
ptSPIDev->hwif_read = SPIHWIFRead; /*!< Function realize DPM read access via SPI transfers (need to be implemented) */
|
||
|
|
ptSPIDev->hwif_write = SPIHWIFWrite; /*!< Function realize DPM write access via SPI transfers (need to be implemented) */
|
||
|
|
}
|
||
|
|
/* Allocate buffer for TX SPI-transfers */
|
||
|
|
ptSPIParam->pabTXBuffer = malloc(2+DEFAULT_BUFFER_SIZE+3); /* Length field (required by SPIWriteChunk) and SPI header are included */
|
||
|
|
if(ptSPIParam->pabTXBuffer == NULL) {
|
||
|
|
fprintf(stderr, "SDPMInit: Allocate memory for the TX buffer\n");
|
||
|
|
goto error_out;
|
||
|
|
}
|
||
|
|
*(uint16_t*)ptSPIParam->pabTXBuffer = DEFAULT_BUFFER_SIZE; /* store buffer length */
|
||
|
|
|
||
|
|
/* Allocate buffer for RX SPI-transfers */
|
||
|
|
ptSPIParam->pabRXBuffer = malloc(2+DEFAULT_BUFFER_SIZE+4); /* Length field (required by SPIReadChunk) and SPI header are included */
|
||
|
|
if(ptSPIParam->pabRXBuffer == NULL) {
|
||
|
|
fprintf(stderr, "SDPMInit: Allocate memory for the RX buffer\n");
|
||
|
|
goto error_out;
|
||
|
|
}
|
||
|
|
*(uint16_t*)ptSPIParam->pabRXBuffer = DEFAULT_BUFFER_SIZE; /* store buffer length */
|
||
|
|
|
||
|
|
DBG("--SDPMInit\n");
|
||
|
|
return ptSPIDev;
|
||
|
|
|
||
|
|
error_out:
|
||
|
|
if (ptSPIParam) {
|
||
|
|
free(ptSPIParam->pabTXBuffer);
|
||
|
|
free(ptSPIParam->pabRXBuffer);
|
||
|
|
}
|
||
|
|
free(ptSPIParam);
|
||
|
|
free(ptSPIDev);
|
||
|
|
close(lFd);
|
||
|
|
DBG("--SDPMInit\n");
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|