558 lines
23 KiB
C
558 lines
23 KiB
C
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/**************************************************************************************
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Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved.
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***************************************************************************************
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$Id: cifXInterrupt.c 14244 2021-10-18 12:30:23Z RMayer $:
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Description:
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cifX Toolkit Interrupt handling routines (ISR/DSR)
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Changes:
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Date Description
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-----------------------------------------------------------------------------------
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2021-10-15 - Rework handling in DSR function, added ulHostCOSFlagsSaved variable
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2018-10-10 - Updated header and definitions to new Hilscher defines
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- Derived from cifX Toolkit V1.6.0.0
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**************************************************************************************/
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#include "cifXHWFunctions.h"
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#include "cifXErrors.h"
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#include "cifXEndianess.h"
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/*****************************************************************************/
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/*! \addtogroup CIFX_TOOLKIT_FUNCS cifX DPM Toolkit specific functions
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* \{ */
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/*****************************************************************************/
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/*****************************************************************************/
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/*! Low-Level interrupt handler
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* \param ptDevInstance Instance that probably generated an IRQ (on PCI devices
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* the routine decides if it was an IRQ for shared interrupt lines)
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* \param fPCIIgnoreGlobalIntFlag Ignore the global interrupt flag on PCI cards,
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* to detect shared interrupts. This might be necessary
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* if the user has already filtered out all shared IRQs
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* \return CIFX_TKIT_IRQ_DSR_REQUESTED/CIFX_TKIT_IRQ_HANDLED on success
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* CIFX_TKIT_IRQ_OTHERDEVICE if the IRQ is not from the device */
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/*****************************************************************************/
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int cifXTKitISRHandler(PDEVICEINSTANCE ptDevInstance, int fPCIIgnoreGlobalIntFlag)
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{
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int iRet;
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/* Check if DPM is available, if not, it cannot be our card, that caused the interrupt */
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if( HWIF_READ32(ptDevInstance, *(uint32_t*)ptDevInstance->pbDPM) == CIFX_DPM_INVALID_CONTENT)
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return CIFX_TKIT_IRQ_OTHERDEVICE;
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if(!ptDevInstance->fIrqEnabled)
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{
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/* Irq is disabled on device, so we assume the user activated the interrupts,
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but wants to poll the card. */
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USER_Trace(ptDevInstance,
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TRACE_LEVEL_ERROR,
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"cifXTKitISRHandler() : We received an interrupt, but IRQs are disabled!");
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iRet = CIFX_TKIT_IRQ_OTHERDEVICE;
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} else
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{
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/* We are working in interrupt mode */
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uint32_t ulChannel;
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int iIrqToDsrBuffer = ptDevInstance->iIrqToDsrBuffer;
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IRQ_TO_DSR_BUFFER_T* ptIsrToDsrBuffer = &ptDevInstance->atIrqToDsrBuffer[iIrqToDsrBuffer];
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HIL_DPM_HANDSHAKE_ARRAY_T* ptHandshakeBuffer = &ptIsrToDsrBuffer->tHandshakeBuffer;
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/* on a DPM module every handshake cell can be read individually,
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on a PCI module the complete handshake register block must be read sequentially */
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if( (!ptDevInstance->fPCICard) ||
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(!ptDevInstance->pbHandshakeBlock) )
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{
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/* DPM card */
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++ptDevInstance->ulIrqCounter;
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ptIsrToDsrBuffer->fValid = 1;
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/* Check if we have a handshake block, if so, we read it completely on DPM hardwares
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to make sure, illegally activated handshake cells, don't cause interrupts */
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if (NULL != ptDevInstance->pbHandshakeBlock)
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{
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HWIF_READN( ptDevInstance,
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ptHandshakeBuffer,
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ptDevInstance->pbHandshakeBlock,
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sizeof(*ptHandshakeBuffer));
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} else
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{
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/* We do not have a handshake block, so we have to read them one by one */
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/* and only for the available channels */
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ptHandshakeBuffer->atHsk[0].ulValue = HWIF_READ32(ptDevInstance, ptDevInstance->tSystemDevice.ptHandshakeCell->ulValue);
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for(ulChannel = 0; ulChannel < ptDevInstance->ulCommChannelCount; ++ulChannel)
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{
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PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)ptDevInstance->pptCommChannels[ulChannel];
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uint32_t ulBlockID = ptChannel->ulBlockID;
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ptHandshakeBuffer->atHsk[ulBlockID].ulValue = HWIF_READ32(ptDevInstance, ptChannel->ptHandshakeCell->ulValue);
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}
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}
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/* we need to check in DSR which handshake bits have changed */
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iRet = CIFX_TKIT_IRQ_DSR_REQUESTED;
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} else
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{
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/* PCI card */
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uint32_t ulIrqState0 = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQState_0));
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uint32_t ulIrqState1 = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQState_1));
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/* First check if we have generated this interrupt by reading the global IRQ status bit */
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if( !fPCIIgnoreGlobalIntFlag &&
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(0 == (ulIrqState0 & MSK_IRQ_STA0_INT_REQ)) )
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{
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/* we have not generated this interrupt, so it must be another device on shared IRQ */
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iRet = CIFX_TKIT_IRQ_OTHERDEVICE;
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} else
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{
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HIL_DPM_HANDSHAKE_ARRAY_T* ptHandshakeBlock = (HIL_DPM_HANDSHAKE_ARRAY_T*)ptDevInstance->pbHandshakeBlock;
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/* confirm all interrupts.
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We can safely clear handshake interrupts here, as we are reading the handshake flags below,
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so we won't miss an IRQ.*/
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HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQState_0, HOST_TO_LE32(ulIrqState0));
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HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQState_1, HOST_TO_LE32(ulIrqState1));
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++ptDevInstance->ulIrqCounter;
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ptIsrToDsrBuffer->fValid = 1;
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/* Only read first 8 Handshake cells, due to a netX hardware issue. Reading flags 8-15 may
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also confirm IRQs for Handshake cell 0-7 due to an netX internal readahead buffer */
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ptHandshakeBuffer->atHsk[HIL_DPM_SYSTEM_CHANNEL_INDEX].ulValue = HWIF_READ32( ptDevInstance, ptHandshakeBlock->atHsk[HIL_DPM_SYSTEM_CHANNEL_INDEX].ulValue);
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ptHandshakeBuffer->atHsk[HIL_DPM_HANDSHAKE_CHANNEL_INDEX].ulValue = HWIF_READ32( ptDevInstance, ptHandshakeBlock->atHsk[HIL_DPM_HANDSHAKE_CHANNEL_INDEX].ulValue);
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for(ulChannel = 0; ulChannel < ptDevInstance->ulCommChannelCount; ++ulChannel)
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ptHandshakeBuffer->atHsk[HIL_DPM_COM_CHANNEL_START_INDEX + ulChannel].ulValue = HWIF_READ32(ptDevInstance, ptHandshakeBlock->atHsk[HIL_DPM_COM_CHANNEL_START_INDEX + ulChannel].ulValue);
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/* we need to check in DSR which handshake bits have changed */
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iRet = CIFX_TKIT_IRQ_DSR_REQUESTED;
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}
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}
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}
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return iRet;
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}
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/*****************************************************************************/
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/*! Process IO Areas for changes / callbacks
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* \param ptChannel Channel Instance
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* \param ptIoArea IO Area
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* \param usChangedBits Bits that have changed since last IRQ
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* \param usUnequalBits Bits that are unequal between host and netX
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* \param fOutput !=0 if an output area is processed */
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/*****************************************************************************/
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static void ProcessIOArea(PCHANNELINSTANCE ptChannel,
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PIOINSTANCE ptIoArea,
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uint16_t usChangedBits,
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uint16_t usUnequalBits,
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int fOutput)
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{
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uint16_t usBitMask = (uint16_t)(1 << ptIoArea->bHandshakeBit);
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if(usChangedBits & usBitMask)
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{
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PFN_NOTIFY_CALLBACK pfnCallback = NULL;
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uint8_t bIOBitState = DEV_GetIOBitstate(ptChannel, ptIoArea, fOutput);
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switch(bIOBitState)
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{
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case HIL_FLAGS_EQUAL:
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if(0 == (usUnequalBits & usBitMask))
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pfnCallback = ptIoArea->pfnCallback;
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break;
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case HIL_FLAGS_NOT_EQUAL:
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if(usUnequalBits & usBitMask)
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pfnCallback = ptIoArea->pfnCallback;
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break;
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case HIL_FLAGS_CLEAR:
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if(0 == (ptChannel->usNetxFlags & usBitMask))
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pfnCallback = ptIoArea->pfnCallback;
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break;
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case HIL_FLAGS_SET:
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if(ptChannel->usNetxFlags & usBitMask)
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pfnCallback = ptIoArea->pfnCallback;
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break;
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}
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if(pfnCallback)
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pfnCallback(ptIoArea->ulNotifyEvent, 0, NULL, ptIoArea->pvUser);
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OS_SetEvent(ptChannel->ahHandshakeBitEvents[ptIoArea->bHandshakeBit]);
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}
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}
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/*****************************************************************************/
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/*! Deferred interrupt handler
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* \param ptDevInstance Instance the DSR is requested for */
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/*****************************************************************************/
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void cifXTKitDSRHandler(PDEVICEINSTANCE ptDevInstance)
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{
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if(!ptDevInstance->fResetActive)
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{
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/* Get actual data buffer index */
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uint32_t ulChannel = 0;
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PCHANNELINSTANCE ptChannel = &ptDevInstance->tSystemDevice;
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int iIrqToDsrBuffer = 0;
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IRQ_TO_DSR_BUFFER_T* ptIrqToDsrBuffer = NULL;
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#ifdef CIFX_TOOLKIT_ENABLE_DSR_LOCK
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/* Lock against ISR */
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OS_IrqLock(ptDevInstance->pvOSDependent);
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#else
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/* ATTENTION: The IrqToDsr Buffer handling implies a "always" higher priority */
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/* of the ISR function. This does usually happens on physical ISR functions */
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/* but does not work if the ISR and DSR are handled as a threads! */
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#endif
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iIrqToDsrBuffer = ptDevInstance->iIrqToDsrBuffer;
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ptIrqToDsrBuffer = &ptDevInstance->atIrqToDsrBuffer[iIrqToDsrBuffer];
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if(!ptIrqToDsrBuffer->fValid)
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{
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/* Interrupt did not provide data yet */
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#ifdef CIFX_TOOLKIT_ENABLE_DSR_LOCK
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/* Release lock against ISR */
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OS_IrqUnlock(ptDevInstance->pvOSDependent);
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#endif
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return;
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} else
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{
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/* Flip data buffer so IRQ uses the other buffer */
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ptDevInstance->iIrqToDsrBuffer ^= 0x01;
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/* Invalidate the buffer, we are now handling */
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ptIrqToDsrBuffer->fValid = 0;
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}
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#ifdef CIFX_TOOLKIT_ENABLE_DSR_LOCK
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/* Release lock against ISR */
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OS_IrqUnlock(ptDevInstance->pvOSDependent);
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#endif
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/* Only process rest of flags if NSF_READY is set. This must be done to prevent
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confusion of the toolkit during a system start (xSysdeviceReset) */
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if(ptIrqToDsrBuffer->tHandshakeBuffer.atHsk[0].t8Bit.bNetxFlags & NSF_READY)
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{
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/*--------------------------------------------------------------------*/
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/* Evaluate device synchronisation flags, the flags are fixed 16 Bit */
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/*--------------------------------------------------------------------*/
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uint16_t usChangedSyncBits;
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uint16_t usOldNSyncFlags = ptDevInstance->tSyncData.usNSyncFlags; /* Remember last known netX flags */
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/* Get pointer to the new flag data from ISR */
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HIL_DPM_HANDSHAKE_CELL_T* ptSyncCell = &ptIrqToDsrBuffer->tHandshakeBuffer.atHsk[NETX_HSK_SYNCH_FLAG_POS];
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/* Get the actual flags */
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ptDevInstance->tSyncData.usNSyncFlags = LE16_TO_HOST(ptSyncCell->t16Bit.usNetxFlags);
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/* Check if there are changed bits since last interrupt from netX side, */
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/* and only process sync if bits have chanded! */
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if ( 0 != (usChangedSyncBits = usOldNSyncFlags ^ ptDevInstance->tSyncData.usNSyncFlags))
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{
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uint32_t ulBitPos;
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uint16_t usUnequalSyncBits;
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/* Create unequal bit mask */
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usUnequalSyncBits = ptDevInstance->tSyncData.usNSyncFlags ^ ptDevInstance->tSyncData.usHSyncFlags;
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/* Signal sync events */
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for(ulBitPos = 0; ulBitPos < NETX_NUM_OF_SYNCH_FLAGS; ++ulBitPos)
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{
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/* There is a valid channel */
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uint16_t usBitMask = (uint16_t)(1 << ulBitPos);
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PCHANNELINSTANCE ptSyncChannel = NULL;
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if (ulBitPos >= ptDevInstance->ulCommChannelCount)
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break;
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ptSyncChannel = (PCHANNELINSTANCE)ptDevInstance->pptCommChannels[ulBitPos];
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if ( usChangedSyncBits & usBitMask)
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{
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uint8_t bState = HIL_FLAGS_NOT_EQUAL;
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int fProcess = 0;
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/* Handle Sync interrupts, read actual state and set bState accordingly */
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if( HIL_SYNC_MODE_HST_CTRL == HWIF_READ8(ptDevInstance, ptSyncChannel->ptCommonStatusBlock->bSyncHskMode))
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bState = HIL_FLAGS_EQUAL;
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/* Check which mode to handle */
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/* HIL_FLAGS_NOT_EQUAL corresponds to DEVICE_CONTROLLED */
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if( (bState == HIL_FLAGS_NOT_EQUAL) &&
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(usUnequalSyncBits & usBitMask) )
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{
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fProcess = 1;
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} else if( (bState == HIL_FLAGS_EQUAL) &&
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(0 == (usUnequalSyncBits & usBitMask)) )
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{
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fProcess = 1;
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}
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if(fProcess)
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{
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/* There is a valid channel */
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/* Check if we have a callback assigned */
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if (ptSyncChannel->tSynch.pfnCallback)
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ptSyncChannel->tSynch.pfnCallback( CIFX_NOTIFY_SYNC, 0, NULL, ptSyncChannel->tSynch.pvUser);
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/* Signal event to allow waiting for sync state without callback */
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if( ptDevInstance->tSyncData.ahSyncBitEvents[ulBitPos])
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OS_SetEvent(ptDevInstance->tSyncData.ahSyncBitEvents[ulBitPos]);
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}
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}
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}
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}
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/*-----------------------------------------------------*/
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/* Evaluate all changed handshake bits on all channels */
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/* Start with SYSTEM channel */
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do
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{
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uint16_t usChangedBits;
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uint16_t usUnequalBits;
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uint16_t usOldNetxFlags = ptChannel->usNetxFlags; /* Remember last known netX flags */
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uint32_t ulIdx;
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/* Address the handshake cell */
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HIL_DPM_HANDSHAKE_CELL_T* ptHskCell = &ptIrqToDsrBuffer->tHandshakeBuffer.atHsk[ptChannel->ulBlockID];
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if(ptChannel->bHandshakeWidth == HIL_HANDSHAKE_SIZE_8BIT)
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{
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ptChannel->usNetxFlags = ptHskCell->t8Bit.bNetxFlags;
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} else
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{
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ptChannel->usNetxFlags = LE16_TO_HOST(ptHskCell->t16Bit.usNetxFlags);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check which bits have changed since last interrupt from netX side */
|
||
|
|
usChangedBits = usOldNetxFlags ^ ptChannel->usNetxFlags;
|
||
|
|
usUnequalBits = ptChannel->usNetxFlags ^ ptChannel->usHostFlags;
|
||
|
|
|
||
|
|
/* Check if we have a valid channel (not for the bootloader) */
|
||
|
|
if(ptChannel->fIsChannel)
|
||
|
|
{
|
||
|
|
/*------------------------------------------*/
|
||
|
|
/* Process CHANNEL flags */
|
||
|
|
/*------------------------------------------*/
|
||
|
|
|
||
|
|
/* -----------------------------------------*/
|
||
|
|
/* Check COM Flag and I/O areas */
|
||
|
|
/* -----------------------------------------*/
|
||
|
|
if(usChangedBits & NCF_COMMUNICATING)
|
||
|
|
{
|
||
|
|
OS_SetEvent(ptChannel->ahHandshakeBitEvents[NCF_COMMUNICATING_BIT_NO]);
|
||
|
|
|
||
|
|
/* check if notification is registered */
|
||
|
|
if (NULL != ptChannel->tComState.pfnCallback)
|
||
|
|
{
|
||
|
|
CIFX_NOTIFY_COM_STATE_T tData;
|
||
|
|
|
||
|
|
tData.ulComState = (ptChannel->usNetxFlags & NCF_COMMUNICATING);
|
||
|
|
|
||
|
|
ptChannel->tComState.pfnCallback( CIFX_NOTIFY_COM_STATE,
|
||
|
|
sizeof(tData),
|
||
|
|
&tData,
|
||
|
|
ptChannel->tComState.pvUser);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check IO - Input Areas */
|
||
|
|
for(ulIdx = 0; ulIdx < ptChannel->ulIOInputAreas; ++ulIdx)
|
||
|
|
{
|
||
|
|
ProcessIOArea(ptChannel,
|
||
|
|
ptChannel->pptIOInputAreas[ulIdx],
|
||
|
|
usChangedBits,
|
||
|
|
usUnequalBits,
|
||
|
|
0);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check IO - Output Areas */
|
||
|
|
for(ulIdx = 0; ulIdx < ptChannel->ulIOOutputAreas; ++ulIdx)
|
||
|
|
{
|
||
|
|
ProcessIOArea(ptChannel,
|
||
|
|
ptChannel->pptIOOutputAreas[ulIdx],
|
||
|
|
usChangedBits,
|
||
|
|
usUnequalBits,
|
||
|
|
1);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* -----------------------------------------*/
|
||
|
|
/* Check COS Flags */
|
||
|
|
/* -----------------------------------------*/
|
||
|
|
/* Check netX for new COS flags */
|
||
|
|
/* -----------------------------------------*/
|
||
|
|
if( usUnequalBits & NCF_NETX_COS_CMD)
|
||
|
|
{
|
||
|
|
uint32_t ulNewCOSFlags = 0;
|
||
|
|
|
||
|
|
/* Lock flag access */
|
||
|
|
OS_EnterLock(ptChannel->pvLock);
|
||
|
|
|
||
|
|
/* Read the flags and acknowledge them */
|
||
|
|
ulNewCOSFlags = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS));
|
||
|
|
|
||
|
|
/* Check if they have changed */
|
||
|
|
if(ptChannel->ulDeviceCOSFlags != ulNewCOSFlags)
|
||
|
|
{
|
||
|
|
ptChannel->ulDeviceCOSFlagsChanged = ptChannel->ulDeviceCOSFlags ^ ulNewCOSFlags;
|
||
|
|
ptChannel->ulDeviceCOSFlags = ulNewCOSFlags;
|
||
|
|
}
|
||
|
|
|
||
|
|
DEV_ToggleBit(ptChannel, HCF_NETX_COS_ACK);
|
||
|
|
|
||
|
|
/* Unlock flag access */
|
||
|
|
OS_LeaveLock(ptChannel->pvLock);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Signal netX COS command flag change */
|
||
|
|
if( usChangedBits & NCF_NETX_COS_CMD)
|
||
|
|
OS_SetEvent(ptChannel->ahHandshakeBitEvents[NCF_NETX_COS_CMD_BIT_NO]);
|
||
|
|
|
||
|
|
/* --------------------------------------------------*/
|
||
|
|
/* Process our own COS flags (Write them to device) */
|
||
|
|
/* --------------------------------------------------*/
|
||
|
|
/* Check if we have new COS flags to write */
|
||
|
|
if ( ptChannel->ulHostCOSFlagsSaved != ptChannel->ulHostCOSFlags)
|
||
|
|
{
|
||
|
|
/* Check if it is allowed to write new flags */
|
||
|
|
if( !(usUnequalBits & NCF_HOST_COS_ACK))
|
||
|
|
{
|
||
|
|
/* Lock flag access */
|
||
|
|
OS_EnterLock(ptChannel->pvLock);
|
||
|
|
|
||
|
|
/* Update COS flags */
|
||
|
|
HWIF_WRITE32(ptDevInstance, ptChannel->ptControlBlock->ulApplicationCOS, HOST_TO_LE32(ptChannel->ulHostCOSFlags));
|
||
|
|
|
||
|
|
/* Store the written values */
|
||
|
|
ptChannel->ulHostCOSFlagsSaved = ptChannel->ulHostCOSFlags;
|
||
|
|
|
||
|
|
/* Signal new COS flags */
|
||
|
|
DEV_ToggleBit(ptChannel, HCF_HOST_COS_CMD);
|
||
|
|
|
||
|
|
/* Remove all enable flags from the local COS flags */
|
||
|
|
ptChannel->ulHostCOSFlags &= ~(HIL_APP_COS_BUS_ON_ENABLE | HIL_APP_COS_INITIALIZATION_ENABLE | HIL_APP_COS_LOCK_CONFIGURATION_ENABLE);
|
||
|
|
|
||
|
|
/* Unlock flag access */
|
||
|
|
OS_LeaveLock(ptChannel->pvLock);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Signal host COS acknowledge flag change */
|
||
|
|
if( usChangedBits & NCF_HOST_COS_ACK)
|
||
|
|
OS_SetEvent(ptChannel->ahHandshakeBitEvents[NCF_HOST_COS_ACK_BIT_NO]);
|
||
|
|
|
||
|
|
} else
|
||
|
|
{
|
||
|
|
/*------------------------------------------*/
|
||
|
|
/* Process SYSTEM DEVICE Hardware COS flags */
|
||
|
|
/*------------------------------------------*/
|
||
|
|
/*----------------------------------------------------*/
|
||
|
|
/* Check if the hardware signals new system COS flags */
|
||
|
|
/*----------------------------------------------------*/
|
||
|
|
if( usUnequalBits & NSF_NETX_COS_CMD)
|
||
|
|
{
|
||
|
|
/* Read the flags and acknowledge them */
|
||
|
|
HIL_DPM_SYSTEM_CHANNEL_T* ptSyschannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptChannel->pbDPMChannelStart;
|
||
|
|
uint32_t ulNewCOSFlags = 0;
|
||
|
|
|
||
|
|
/* Lock flag access */
|
||
|
|
OS_EnterLock(ptChannel->pvLock);
|
||
|
|
|
||
|
|
/* Read the actual "System COS" flags */
|
||
|
|
ulNewCOSFlags = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSyschannel->tSystemState.ulSystemCOS));
|
||
|
|
|
||
|
|
/* Read the flags and acknowledge them */
|
||
|
|
if(ptChannel->ulDeviceCOSFlags != ulNewCOSFlags)
|
||
|
|
{
|
||
|
|
ptChannel->ulDeviceCOSFlagsChanged = ptChannel->ulDeviceCOSFlags ^ ulNewCOSFlags;
|
||
|
|
ptChannel->ulDeviceCOSFlags = ulNewCOSFlags;
|
||
|
|
}
|
||
|
|
|
||
|
|
DEV_ToggleBit(ptChannel, HSF_NETX_COS_ACK);
|
||
|
|
|
||
|
|
/* Unlock flag access */
|
||
|
|
OS_LeaveLock(ptChannel->pvLock);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Signal COS CMD bits */
|
||
|
|
if(usChangedBits & NSF_NETX_COS_CMD)
|
||
|
|
OS_SetEvent(ptChannel->ahHandshakeBitEvents[NSF_NETX_COS_CMD_BIT_NO]);
|
||
|
|
|
||
|
|
/* Signal COS ACK bits */
|
||
|
|
if(usChangedBits & NSF_HOST_COS_ACK)
|
||
|
|
OS_SetEvent(ptChannel->ahHandshakeBitEvents[NSF_HOST_COS_ACK_BIT_NO]);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*------------------------------------------*/
|
||
|
|
/* Process the send receive MBX flags */
|
||
|
|
/*------------------------------------------*/
|
||
|
|
/* Check Receive Mailbox */
|
||
|
|
if( usChangedBits & ptChannel->tRecvMbx.ulRecvACKBitmask)
|
||
|
|
{
|
||
|
|
if( (usUnequalBits & ptChannel->tRecvMbx.ulRecvACKBitmask) &&
|
||
|
|
(NULL != ptChannel->tRecvMbx.pfnCallback) )
|
||
|
|
{
|
||
|
|
CIFX_NOTIFY_RX_MBX_FULL_DATA_T tRxData;
|
||
|
|
|
||
|
|
tRxData.ulRecvCount = LE16_TO_HOST(HWIF_READ16(ptDevInstance, ptChannel->tRecvMbx.ptRecvMailboxStart->usWaitingPackages));
|
||
|
|
|
||
|
|
ptChannel->tRecvMbx.pfnCallback(CIFX_NOTIFY_RX_MBX_FULL,
|
||
|
|
sizeof(tRxData),
|
||
|
|
&tRxData,
|
||
|
|
ptChannel->tRecvMbx.pvUser);
|
||
|
|
}
|
||
|
|
OS_SetEvent(ptChannel->ahHandshakeBitEvents[ptChannel->tRecvMbx.bRecvACKBitoffset]);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check Send Mailbox */
|
||
|
|
if( usChangedBits & ptChannel->tSendMbx.ulSendCMDBitmask)
|
||
|
|
{
|
||
|
|
if( (0 == (usUnequalBits & ptChannel->tSendMbx.ulSendCMDBitmask)) &&
|
||
|
|
(NULL != ptChannel->tSendMbx.pfnCallback) )
|
||
|
|
{
|
||
|
|
CIFX_NOTIFY_TX_MBX_EMPTY_DATA_T tTxData;
|
||
|
|
|
||
|
|
tTxData.ulMaxSendCount = LE16_TO_HOST(HWIF_READ16(ptDevInstance, ptChannel->tSendMbx.ptSendMailboxStart->usPackagesAccepted));
|
||
|
|
|
||
|
|
ptChannel->tSendMbx.pfnCallback(CIFX_NOTIFY_TX_MBX_EMPTY,
|
||
|
|
sizeof(tTxData),
|
||
|
|
&tTxData,
|
||
|
|
ptChannel->tSendMbx.pvUser);
|
||
|
|
}
|
||
|
|
OS_SetEvent(ptChannel->ahHandshakeBitEvents[ptChannel->tSendMbx.bSendCMDBitoffset]);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Next channel */
|
||
|
|
if(ulChannel < ptDevInstance->ulCommChannelCount)
|
||
|
|
ptChannel = ptDevInstance->pptCommChannels[ulChannel];
|
||
|
|
|
||
|
|
ulChannel++;
|
||
|
|
|
||
|
|
} while(ulChannel <= ptDevInstance->ulCommChannelCount);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*****************************************************************************/
|
||
|
|
/*! \} */
|
||
|
|
/*****************************************************************************/
|