remove motor_control folder from the repository Fixes: PINDSW-5635 Signed-off-by: Naresh A <nareshk@ti.com>
144 lines
5.7 KiB
C
144 lines
5.7 KiB
C
/*
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* Copyright (C) 2023 Texas Instruments Incorporated
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _EPWM_DC_H_
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#define _EPWM_DC_H_
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#include <stdint.h>
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#include <drivers/hw_include/hw_types.h>
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#include <drivers/epwm.h>
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/* Status return values */
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#define EPWM_DC_SOK ( 0 )
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#define EPWM_ID_0 ( 0 )
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#define EPWM_ID_1 ( 1 )
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#define EPWM_ID_2 ( 2 )
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#define EPWM_NUM_OUT_CH ( EPWM_OUTPUT_CH_MAX + 1 )
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/* EPWM configuration parameters */
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typedef struct _EPwmCfgPrms_t
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{
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uint32_t epwmId; /* EPWM ID */
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uint32_t epwmBaseAddr; /* EPWM base address */
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uint32_t epwmOutChEn; /* EPWM output channel (A/B) enable bit mask */
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uint32_t hspClkDiv; /* EPWM High-Speed Time-base Clock Prescale Bits */
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uint32_t clkDiv; /* EPWM Time-base Clock Prescale Bits */
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uint32_t epwmTbFreq; /* EPWM timebase clock */
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uint32_t epwmOutFreq; /* EPWM output frequency */
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/* EPWM duty cycle */
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uint32_t epwmDutyCycle[EPWM_NUM_OUT_CH];
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uint32_t epwmTbCounterDir; /* EPWM counter direction (Up, Down, Up/Down) */
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/* TB sync in config */
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Bool cfgTbSyncIn; /* config TB sync in flag (true/false) */
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uint32_t tbPhsValue; /* cfgTbSyncIn==TRUE: timer phase value to load on Sync In event */
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uint32_t tbSyncInCounterDir; /* cfgTbSyncIn==TRUE: counter direction on Sync In event */
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/* TB sync out config */
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Bool cfgTbSyncOut; /* config TB sync output flag (true/false) */
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uint32_t tbSyncOutMode; /* cfgTbSyncOut==TRUE: Sync Out mode */
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/* AQ config */
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EPWM_AqActionCfg aqCfg[EPWM_NUM_OUT_CH];
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/* DB config */
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Bool cfgDb; /* config DB flag (true/false) */
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EPWM_DeadbandCfg dbCfg; /* Deadband config */
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/* ET config */
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Bool cfgEt; /* config ET module */
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uint32_t intSel; /* ET interrupt select */
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uint32_t intPrd; /* ET interrupt period */
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} EPwmCfgPrms_t;
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/* EPWM object */
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typedef struct _EPwmObj_t
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{
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uint32_t epwmId; /* EPWM ID */
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uint32_t epwmBaseAddr; /* EPWM base address */
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uint32_t epwmOutChEn; /* EPWM output channel (A/B) enable bit mask */
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uint32_t hspClkDiv; /* EPWM High-Speed Time-base Clock Prescale Bits */
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uint32_t clkDiv; /* EPWM Time-base Clock Prescale Bits */
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uint32_t epwmTbFreq; /* EPWM timebase clock */
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uint32_t epwmOutFreq; /* EPWM output frequency */
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/* EPWM duty cycle */
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uint32_t epwmDutyCycle[EPWM_NUM_OUT_CH];
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uint32_t epwmPrdVal; /* EPWM period value */
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// Bool updateOut; /* Flag indicates whether to update EPWM A/B outputs */
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/* For handling up-down count alternating period
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when period isn't divisible by 2 */
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Bool toggleEpwmPrd; /* Flag for EPWM in alternating period mode */
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uint8_t toggleEpwmPrdState; /* Alternating period state:
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'Lower' or 'Upper' period written on alternate ISRs */
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uint32_t epwmPrdValL; /* 'Lower' EPWM period value written in 'Lower' state */
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uint32_t epwmPrdValU; /* 'Upper' EPWM period value written in 'Upper' state */
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/* For handling ChA 100% Duty Cycle */
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uint32_t cmpAVal; /* Current CMPA value */
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Bool cmpANzToZ; /* Flag for EPWM transition CMPA!=0 to CMPA=0 */
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Bool cmpAZToNz; /* Flag for EPWM transition CMPA=0 to CMPA!=0 */
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/* For handling ChB 100% Duty Cycle */
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uint32_t cmpBVal; /* Current CMPB value */
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Bool cmpBNzToZ; /* Flag for EPWM transition CMPB!=0 to CMPB=0 */
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Bool cmpBZToNz; /* Flag for EPWM transition CMPB=0 to CMPB!=0 */
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} EPwmObj_t;
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/* EPWM Handle */
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typedef EPwmObj_t * Epwm_Handle;
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/* Initialize EPWM */
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Epwm_Handle epwmInit(
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EPwmCfgPrms_t *pEpwmCfgPrms,
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EPwmObj_t *pEpwmObj
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);
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/* Update EPWM period */
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int32_t epwmUpdatePrd(
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Epwm_Handle hEpwm,
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uint32_t epwmOutFreqSet
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);
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/* Update EPWM A/B outputs */
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int32_t epwmUpdateOut(
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Epwm_Handle hEpwm,
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float VrefA,
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float VrefB
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);
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#endif /* _EPWM_DC_H_ */
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