c5bc321959
- Align to coding guidelines - Remove am243x-evm examples Fixes: PINDSW-5479 Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
241 lines
7.9 KiB
C
241 lines
7.9 KiB
C
/*
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* Copyright (C) 2023 Texas Instruments Incorporated
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef BISSC_API_H_
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#define BISSC_API_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "bissc_drv.h"
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/**
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* \defgroup BISSC_API_MODULE APIs for BiSSC Encoder
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* \ingroup POSITION_SENSE_API
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*
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* Here is the list of APIs used for BiSSC encoder communication protocol
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*
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* @{
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*/
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/**
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* \brief Send the BiSSC command and wait till firmware acknowledges
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*
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* \retval SystemP_SUCCESS for success, SystemP_FAILURE for failure
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*
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*/
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int32_t bissc_command_process(struct bissc_priv *priv);
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/**
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* \brief Trigger sending the BiSSC command in PRU
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*
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*
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*/
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void bissc_command_send(struct bissc_priv *priv);
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/**
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* \brief Wait till PRU finishes BiSSC transaction
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*
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*
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*/
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int32_t bissc_command_wait(struct bissc_priv *priv);
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/**
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* \brief Get single cycle BiSS-C position data
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*
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*/
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int32_t bissc_get_pos(struct bissc_priv *priv);
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/**
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* \brief Configure EnDat clock
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] clk_cfg pointer to structure containing clock configuration data
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*
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*/
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void bissc_config_clock(struct bissc_priv *priv,
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struct bissc_clk_cfg *clk_cfg);
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/**
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* \brief Select channel to be used by BiSSC master
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] mask channel mask
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* \param[in] totalch total number of channels in use
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*
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*/
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void bissc_config_channel(struct bissc_priv *priv, int32_t mask, int32_t totalch);
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/**
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* \brief Configure the channels to be used by BiSSC master
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] mask channel mask
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*
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*/
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void bissc_config_load_share(struct bissc_priv *priv, int32_t mask);
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/**
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* \brief Enable load share mode for BiSSC master
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*
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*/
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void bissc_enable_load_share_mode(struct bissc_priv *priv);
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/**
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* \brief Configure the primary core for load share mode
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] mask channel mask
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*
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*/
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void bissc_config_primary_core_mask(struct bissc_priv *priv, uint8_t mask);
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/**
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* \brief Wait for BiSSC master firmware to initialize
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] timeout timeout to wait for initialization
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* \param[in] mask channel mask
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* \retval SystemP_SUCCESS for success, SystemP_FAILURE for failure
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*
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*/
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int32_t bissc_wait_for_fw_initialization(struct bissc_priv *priv, uint32_t timeout, uint8_t mask);
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/**
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* \brief Initialize BiSSC hardware interface
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*
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*/
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void bissc_hw_init(struct bissc_priv *priv);
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/**
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* \brief Initialize BiSSC firmware interface address and get the pointer
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* to struct bissc_priv instance
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*
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* \param[in] gPruIcssXHandle BiSSC firmware interface address
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* \param[in] slice ICSS PRU SLICE
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* \param[in] frequency Input frequency
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* \param[in] core_clk_freq Core clock frequency
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* \param[in] uart_clk_freq Uart clock frequency
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*
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* \retval priv pointer to struct bissc_priv instance
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*
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*/
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struct bissc_priv *bissc_init(PRUICSS_Handle gPruIcssXHandle,
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int32_t slice,
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uint32_t frequency,
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uint32_t core_clk_freq,
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uint32_t uart_clk_freq);
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/**
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* \brief Update max processing time and bit index to poll in fifo data
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*
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*/
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void bissc_update_max_proc_delay(struct bissc_priv *priv);
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/**
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* \brief Wait for BiSSC master firmware to measure processing time
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] timeout timeout to wait for initialization
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* \retval SystemP_SUCCESS for success, SystemP_FAILURE for failure
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*
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*/
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int32_t bissc_wait_measure_proc_delay(struct bissc_priv *priv, uint32_t timeout);
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/**
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* \brief Set default configuration parameters for BiSSC Master firmware
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] icssgclk ICSSG core clock for firmware reference
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*
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*/
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void bissc_set_default_initialization(struct bissc_priv *priv, uint64_t icssgclk);
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/**
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* \brief Update data length with encoder bit width for BiSSC Master firmware
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] single_turn_len Encoder's single turn resolution
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* \param[in] multi_turn_len Encoder's multi turn resolution
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* \param[in] num_pru number(index) of PRU in use
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*/
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void bissc_update_data_len(struct bissc_priv *priv, uint32_t single_turn_len[], uint32_t multi_turn_len[], int32_t num_pru);
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/**
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* \brief Set control command and process the ctrl communication read/write
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] ctrl_cmd Hex equivalent of control command
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* \retval SystemP_SUCCESS for success, SystemP_FAILURE for failure
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*/
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int32_t bissc_set_ctrl_cmd_and_process(struct bissc_priv *priv, uint32_t ctrl_cmd[]);
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/**
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* \brief Configure the master for EnDat mode
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*/
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void bissc_config_endat_mode(struct bissc_priv *priv);
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/**
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* \brief Clear the channel specific frame size cfg registers.
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*/
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void bissc_config_clr_cfg0(struct bissc_priv *priv);
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/**
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* \brief Get measured processing delay of individual channel.
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*
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* \param[in] priv cookie returned by \ref bissc_init
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*/
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void bissc_get_enc_proc_delay(struct bissc_priv *priv);
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/**
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* \brief Calculate Rx and Tx divisors for given frequency.
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*
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* \param[in] priv cookie returned by \ref bissc_init
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* \param[in] clk_cfg pointer to structure containing clock configuration data.
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*/
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int32_t bissc_calc_clock(struct bissc_priv *priv, struct bissc_clk_cfg *clk_cfg);
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif
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