c5bc321959
- Align to coding guidelines - Remove am243x-evm examples Fixes: PINDSW-5479 Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
190 lines
7.8 KiB
C
190 lines
7.8 KiB
C
/*
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* Copyright (C) 2023 Texas Instruments Incorporated
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef BISSC_DRV_H_
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#define BISSC_DRV_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdio.h>
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#include <string.h>
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#include <math.h>
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#include <drivers/pruicss.h>
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#include <position_sense/bissc/include/bissc_interface.h>
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/* Single PRU - Single channel configuration */
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#define BISSC_MODE_SINGLE_CHANNEL_SINGLE_PRU (0U)
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/* Single PRU - Multichannel configuration */
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#define BISSC_MODE_MULTI_CHANNEL_SINGLE_PRU (1U)
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/* Multichannel - Load Share configuration */
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#define BISSC_MODE_MULTI_CHANNEL_MULTI_PRU (2U)
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/* Minimum and Maximum BiSSC cycle time depends on various params as below:
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TCycle_min = TMA ∗ (5 + DLEN + CRCLEN) + tLineDelay + tbusy_max + busy_s_max + tTO
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Instead wait for max of 5 ms as this can vary for different encoders and for daisy chain
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*/
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#define BISSC_MAX_CYCLE_TIMEOUT 5
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/* Maximum number of Endat Channels*/
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#define NUM_ED_CH_MAX 3
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/* Maximum number of BiSS-C Encoders connected in Daisy chain*/
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#define NUM_ENCODERS_MAX 3
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/* Max processing delay as per spec - values are in valid bits/clock cycles*/
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#define BISSC_MAX_PROC_DELAY_1MHZ 40
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#define BISSC_MAX_PROC_DELAY_2MHZ 80
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#define BISSC_MAX_PROC_DELAY_5MHZ 200
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#define BISSC_MAX_PROC_DELAY_8MHZ 320
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#define BISSC_MAX_PROC_DELAY_10MHZ 400
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#define BISSC_RX_SAMPLE_SIZE 7 /* 8x over clock */
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#define BISSC_RX_SAMPLE_SIZE_10MHZ 3 /* 4x over clock */
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#define BISSC_POS_CRC_LEN 6 /* Number of position data CRC bits */
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#define BISSC_EW_LEN 2 /* Number of Error and Warning bits */
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#define BISSC_CTRL_CMD_CRC_LEN 4 /* Number of CTRL cmd CRC bits */
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#define BISSC_POS_DATA_LEN_DEFAULT 12 /* Default data length instead of garbage*/
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/* Allowed frequencies in MHz for BiSSC */
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#define BISSC_FREQ_1MHZ 1
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#define BISSC_FREQ_2MHZ 2
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#define BISSC_FREQ_5MHZ 5
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#define BISSC_FREQ_8MHZ 8
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#define BISSC_FREQ_10MHZ 10
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/**
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* \brief Structure defining EnDat clock configuration for selected frequency
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*
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* \details Rx, Tx divisors for selected frequency, oversampling rate, core_clk/uart clock source status.
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*
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*/
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struct bissc_clk_cfg
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{
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uint16_t rx_div;
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/**< Rx divisor for selected frequency*/
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uint16_t tx_div;
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/**< Tx divisor for selected frequency*/
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uint16_t rx_div_attr;
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/**< Rx oversampling rate*/
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uint16_t is_core_clk;
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/**< Status for core_clk clock source*/
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};
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/**
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* \brief Structure defining BiSSC Position data results
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*
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* \details position data result(raw data, angle and number of turns), error-warning, 6-bit received crc, 6-bit otf crc.
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*/
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struct bissc_position_info
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{
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uint64_t position[NUM_ENCODERS_MAX];
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/**< Position data results from each encoder connected in daisy chain*/
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float angle[NUM_ENCODERS_MAX];
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/**< Single turn result(Angle) for each encoder connected in daisy chain*/
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uint32_t num_of_turns[NUM_ENCODERS_MAX];
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/**< Multi turn result(No. of rotations) for each encoder connected in daisy chain*/
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uint8_t ew[NUM_ENCODERS_MAX];
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/**< Error and Warning result for each encoder connected in daisy chain*/
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uint8_t rcv_crc[NUM_ENCODERS_MAX];
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/**< Received 6-bit crc for each encoder connected in daisy chain*/
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uint8_t otf_crc[NUM_ENCODERS_MAX];
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/**< Calculated otf 6-bit crc for each encoder connected in daisy chain*/
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};
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/**
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* \brief Structure defining BiSSC Channel specific control communication(ctrl) results
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*
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* \details cds results, ctrl 4 bit received crc and ctrl otf crc.
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*
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*/
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struct bissc_control_info
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{
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uint8_t cmd_result;
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/**< Control communication result received from the encoder*/
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uint8_t cmd_rcv_crc;
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/**< Control Communication received 4-bit crc*/
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uint8_t cmd_otf_crc;
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/**< Control Communication calculated otf crc*/
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};
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/**
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* \brief Initialize BiSS-C firmware interface address and get the pointer to struct bissc_priv instance
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*
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* \details contains ICSS slice, load share, data lengths, channel, safety specific information and a pointer to bissc_pruicss_xchg structure.
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*
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*/
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struct bissc_priv
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{
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int32_t pruicss_slicex;
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/**< PRU ICSS slice number*/
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int32_t load_share;
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/**< Load share flag*/
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int32_t data_len[NUM_ED_CH_MAX][NUM_ENCODERS_MAX];
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/**< Resolution of each encoder connected in daisy chain config to each channel*/
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int32_t single_turn_len[NUM_ED_CH_MAX][NUM_ENCODERS_MAX];
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/**< Single turn resolution of each encoder connected in daisy chain config to each channel*/
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int32_t multi_turn_len[NUM_ED_CH_MAX][NUM_ENCODERS_MAX];
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/**< Multi turn resolution of each encoder connected in daisy chain config to each channel*/
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int32_t channel[NUM_ED_CH_MAX];
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/**< Array of all configured channel*/
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struct bissc_pruicss_xchg *pruicss_xchg;
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/**< Structure defining BiSSC interface*/
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int32_t has_safety;
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/**< Status for safety support*/
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void *pruicss_cfg;
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/**< PRU-ICSS cfg registers base offset*/
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int64_t raw_data;
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/**< Raw data received from encoder*/
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struct bissc_position_info enc_pos_data[NUM_ED_CH_MAX];
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/**< Structure containing encoders position data results for each channel*/
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struct bissc_control_info enc_ctrl_data[NUM_ED_CH_MAX];
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/**< Structure containing encoders control communication results for each PRU*/
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int32_t pd_crc_err_cnt[NUM_ED_CH_MAX][NUM_ENCODERS_MAX];
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/**< Position data crc error count for each encoder connected in daisy chain to each channel*/
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int32_t ctrl_crc_err_cnt[NUM_ED_CH_MAX];
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/**< Control communication crc error count for each encoder connected to each PRU in load share*/
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int32_t num_encoders[NUM_ED_CH_MAX];
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/**< Number of encoders connected in daisy chain to each PRU in load share*/
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int32_t totalchannels;
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/**< Total number of channels configured*/
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uint16_t proc_delay[NUM_ED_CH_MAX];
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/**< Measured Processing delay of individual channel*/
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uint32_t baud_rate;
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/**< Input baudrate*/
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uint32_t core_clk_freq;
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/**< Core clock frequency*/
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uint32_t uart_clk_freq;
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/**< UART clock frequency*/
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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