# %SDFM {#EXAMPLE_MOTORCONTROL_SDFM}
[TOC]
The ICSS %SDFM driver provides a well defined set of APIs to expose sigma delta interface.
The ICSS %SDFM example invokes these APIs to
- Set %SDFM channels
- Set ACC source, NC OSR, OC OSR, Clock source & Clock inversion
- Enable & disable threshold comparators
- Set high and low threshold values
- configure normal current sample trigger time (time for read sample)
- Enable & disable double update
- Inform firmware to enable %SDFM mode
- Configure GPIO pins for high and low threshold
Once these steps are executed
- ICSS %SDFM example waits for a interrupt (trigger by %SDFM firmware) to read sample data
- when interrupt occurs, example reads sample data from DMEM and again comes back to waiting loop
### ICSS SDFM Example Implementation
Following section describes the Example implementation of ICSS %SDFM on ARM(R5F).
\image html SDFM_EXAMPLE_FLOWCHART.png "ICSS SDFM Example"
## Important files and directory structure
| Test detail
| Steps
| Pass/fail crieteria
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| 1. Normal current sample data |
1. Run icss sdfm example on am64x/am243x board |
he drawn graph and raw data should look like the attached image |
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2. Draw the graph of sdfm_ch0_samples, sdfm_ch1_samples and sdfm_ch2_samples arrays |
\image html SDFM_sample_output.PNG "NC sample data" |
| 2. To check raw data for Single Update (64 NC OSR) |
1. Set NC OSR to 64 |
The drawn graph and raw data should look like the attached image |
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2. Set single update trigger time to half of epwm cycle time |
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3. Disable double update |
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3. Build and run icss sdfm example |
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4. Draw graph for Raw data |
\image html SDFM_Single_update_64OSR.PNG "Single Update Raw data" |
| 3. To check Raw data for Double Update |
1. Set NC OSR to 64 |
drawn Graphs and raw data should look like attached image |
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2. Enable double update |
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3. Set single update trigger time to 1/4 of epwm cycle time |
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4. Set double update trigger time to 3/4 of epwm cycle time |
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5. Build and run icss sdfm example |
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6. Draw graph for Raw data |
\image html SDFM_Double_update_64OSR.PNG "Double Update Raw data" |
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The pattern of the graph should be different from the single update graph. It takes 2 samples in one EPWM cycle so the graph pattern should look more like a sine wave compare to single update graph |
| 4. To check Threshold comparator and Over current |
1. Set High Threshold to 3500 and low threshold to 2500 |
Logic analyzer capture for High & Low Thresholds |
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2. Set Over current OSR to 32 |
\image html SDFM_threshold_comparator_salea_capture.png "Logic analyzer Capture" |
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3. Probe Ch0 high, low threshold GPIO pins & input signal |
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4. Build and run icss sdfm example |
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5. Capture signal in Logic analyzer |
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| 5. To check NC Samples with Different NC OSR Values |
1. Set NC OSR values between 16 to 255 |
Raw data should have different resolution for different OSR values |
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2. Build and run icss sdfm example |
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3. Observe resolution of raw data |
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| 6. To check NC samples with different sdfm clock values |
1. Set NC OSR to 64 |
Raw data should have different resolution for different sdfm clock values |
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2. Set ecap_divider variable in sdfm.c file for different sd clock generation |
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3. Set Sigma delta clock equal to ecap generated clock |
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4. Build and run example |
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5. Observe resolution of raw data |
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\cond SOC_AM243X
| 7.Testing with sdfm clock from EPWM |
1. Make hardware set up like attached image |
All test cases results should match with ECAP test case results |
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2. \image html SDFM_EPWM1_HW_Setup.png "SDFM: Hw set for clock from EPWM" |
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3. Enable "APP_EPWM1_ENABLE" macro in app_sdfm.c file |
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4. Set EPWM1 out put frequency to 12.5MHz or 5MHz in app_sdfm.c file |
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5. Set Sigma delta clock equal to EPWM1 output frequency |
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6. Build and run icss sdfm example |
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7. Test all tese cases from 1 to 5 with EPWM clock |
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\endcond