Commit Graph

19 Commits

Author SHA1 Message Date
Rajul Bhambay
7f45f14721 am64x/am243x: HDSL: Multi-channel Sync Mode
- 2 channels in Sync mode
 - fix for long msg issue

Fixes: PINDSW-5489, PINDSW-5538

Signed-off-by: Rajul Bhambay <r-bhambay@ti.com>
2023-08-29 15:01:42 +05:30
Dhaval Khandla
7bc9f4f7bf am64x/am243x: hdsl: Update VERSION register definition
- Remove coding field
- Higher 4 bits represent major version
- Update version to 0.5

Fixes: PINDSW-6536

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-27 15:58:23 +05:30
Dhaval Khandla
c1f342479a am64x/am243x: hdsl: Remove maximum deviation related processing
- Remove MAXDEV_H, MAXDEV_L, MAXDEV_H_THRES, MAXDEV_L_THRES from memory map
  in driver
- Fix the typo in register names for threshold registers

Fixes: PINDSW-6543

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-27 15:58:23 +05:30
Achala Ram
044f71b27d Pull request #10: am64x/am243: Enable Multi channel continuous mode
Merge in PINDSW/motor_control_sdk from a0502729_PINDSW-5681_EnDat_enable_multi_channel_continuous_mode to next

* commit '34b62601844e718b3c9484fa6290eac437330e44':
  am64x/am243: EnDat: Enable periodic trigger mode for multi-channel
2023-08-25 22:52:07 -05:00
Achala Ram
34b6260184 am64x/am243: EnDat: Enable periodic trigger mode for multi-channel
- Also fix propagation delay related configuration

Fixes: PINDSW-5681,PINDSW-6533

Signed-off-by: Achala Ram <a-ram@ti.com>
2023-08-25 22:16:39 +05:30
Achala Ram
c41804bd2e am64x/am243: SDFM: Add trigger based normal current sampling
- Add support for trigger based sampling by using IEP compare
  events
- Add support for double update per PWM cycle
- Fixed the IEP compare event hit value calculation
- Tested with SDFM clock input from EPWM

Fixes: PINDSW-5522, PINDSW-6544, PINDSW-6546

Signed-off-by: Achala Ram <a-ram@ti.com>
2023-08-25 22:10:06 +05:30
Dhaval Khandla
47b87f5cf7 am64x/am243x: hdsl: Remove SUC instruction usage
- SUC instruction does not work as expected

Fixes: PINDSW-6531

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 17:00:53 +05:30
Dhaval Khandla
0fe32fbc31 am64x/am243x: hdsl: Fix ONLINE_STATUS_1 register corruption
- TEMP_REG1 was being used by QM_ADD and ONLINE STATUS update in
  v-frame processing
- Update version to 0.4

Fixes: PINDSW-6487

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
4f8af91522 am64x/am243x: hdsl: Fix QMLW bits in ONLINE STATUS registers
- Mask was not applied to QM register before checking the low value
- Enable QMLW/POS checks for all H-frames

Fixes: PINDSW-6530

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
dd0d2e356b am64x/am243x: hdsl: Make FREL/FRES bit set sticky in EVENT/EVENT_S
- Firmware should not clear these bits in EVENT/EVENT_S registers
- Update the version to 0.3

Fixes: PINDSW-6526

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
6b8d4c32cc am64x/am243x: hdsl: Fix reset behaviour after triggering manual reset
- Remove HALT instructions
- Clear all registers after reset

Fixes: PINDSW-6492

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
36a591f12b am64x/am243x: hdsl: Add versioning in firmware
- Update the version to 0.2
- Use the VERSION and VERSION2 register
- Remove the hardcoding from driver

Fixes: PINDSW-6518

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
7605041284 am64x/am243x: hdsl: Fix the SUM/SSUM/FIX1 bit configuration in ONLINE STATUS registers
- MASK_SUM should not be used for masking SUMMARY while updating these
  SUM and SSUM bits in ONLINE STATUS registers
- Fix the mask for SCE and VPOS updates

Fixes: PINDSW-6487, PINDSW-6488

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
8d4349c792 am64x/am243x: hdsl: Fix the fast position and velocity calculation
- Fix sign extension in estimator for relative position and acceleration
  addition
- Fix sign estimation for relative position calculation
- Remove an unnecessary RET instruction
- Fix register corruption for ALIGN_PH
- Fix register usage for DTE error signaling

Fixes: PINDSW-5689

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
9ac1395d6e am64x/am243x: hdsl: Fix the two most significant bytes of fast position
- Register corruption was causing loss of multi-turn data in fast position

Fixes: PINDSW-5651

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:00 +05:30
Dhaval Khandla
9ce9770c05 am64x/am243x: hdsl: Update the register memory map
- Fix the address of ONLINE STATUS bytes by adding a reserved byte
- Create separate entries for low and high bytes of ONLINE STATUS registers
- Add SAFE_CTRL and POSTX registers
- Use high and low addresses in firmware for ONLINE STATUS registers

Fixes: PINDSW-6489

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:00 +05:30
Naresh A
206f344bd1 am64x/am243x/am263x : remove motor_control folder from the repository
remove motor_control folder from the repository

Fixes: PINDSW-5635

Signed-off-by: Naresh A <nareshk@ti.com>
2023-07-13 15:23:20 +05:30
Naresh A
5599e4387e am64x/am243x/am263x : remove MCU_PLUS_SDK_PATH variable from repository
remove MCU_PLUS_SDK_PATH variable from repository

Fixes: PINDSW-5635

Signed-off-by: Naresh A <nareshk@ti.com>
2023-07-11 11:23:31 +05:30
Naresh A
5f968b0bf2 am64x/am243x/am263x : initial commit for motor control sdk
Initial commit for motor control sdk

Fixes: PINDSW-5635

Signed-off-by: Naresh A <nareshk@ti.com>
2023-07-04 18:02:46 +05:30