diff --git a/.project/device/project_am243x.js b/.project/device/project_am243x.js index ea835cd..18220e0 100644 --- a/.project/device/project_am243x.js +++ b/.project/device/project_am243x.js @@ -6,6 +6,7 @@ const component_file_list = [ "source/position_sense/hdsl/.project/project.js", "source/position_sense/tamagawa/.project/project.js", "source/position_sense/bissc/.project/project.js", + "source/pruicss_pwm/.project/project.js" ]; const device_defines = { diff --git a/.project/device/project_am64x.js b/.project/device/project_am64x.js index e4d17ca..2c63bac 100644 --- a/.project/device/project_am64x.js +++ b/.project/device/project_am64x.js @@ -5,6 +5,7 @@ const component_file_list = [ "source/position_sense/endat/.project/project.js", "source/position_sense/hdsl/.project/project.js", "source/position_sense/tamagawa/.project/project.js", + "source/pruicss_pwm/.project/project.js" ]; const device_defines = { diff --git a/docs_src/docs/api_guide/device/am243x/components.cfg b/docs_src/docs/api_guide/device/am243x/components.cfg index d1bcb68..5d53f9a 100644 --- a/docs_src/docs/api_guide/device/am243x/components.cfg +++ b/docs_src/docs/api_guide/device/am243x/components.cfg @@ -22,3 +22,4 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/bissc/include/bissc_drv. INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/bissc/include/bissc_interface.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_api.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/pruicss_pwm/include/pruicss_pwm.h diff --git a/docs_src/docs/api_guide/device/am64x/components.cfg b/docs_src/docs/api_guide/device/am64x/components.cfg index ee6c538..2b7e387 100644 --- a/docs_src/docs/api_guide/device/am64x/components.cfg +++ b/docs_src/docs/api_guide/device/am64x/components.cfg @@ -17,3 +17,4 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/hdsl/include/hdsl_drv.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/tamagawa/include/tamagawa_drv.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_api.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/pruicss_pwm/include/pruicss_pwm.h diff --git a/makefile.am243x b/makefile.am243x index b82783e..cb57a1d 100644 --- a/makefile.am243x +++ b/makefile.am243x @@ -37,6 +37,7 @@ help: @echo $(MAKE) -s -f makefile.am243x motorcontrol_hdsl_r5f.ti-arm-clang @echo $(MAKE) -s -f makefile.am243x motorcontrol_tamagawa_r5f.ti-arm-clang @echo $(MAKE) -s -f makefile.am243x motorcontrol_bissc_r5f.ti-arm-clang + @echo $(MAKE) -s -f makefile.am243x pruicss_pwm_r5f.ti-arm-clang @echo . @echo Library clean targets, @echo ====================== @@ -45,6 +46,7 @@ help: @echo $(MAKE) -s -f makefile.am243x motorcontrol_hdsl_r5f.ti-arm-clang_clean @echo $(MAKE) -s -f makefile.am243x motorcontrol_tamagawa_r5f.ti-arm-clang_clean @echo $(MAKE) -s -f makefile.am243x motorcontrol_bissc_r5f.ti-arm-clang_clean + @echo $(MAKE) -s -f makefile.am243x pruicss_pwm_r5f.ti-arm-clang_clean @echo . @echo Example build targets, @echo ====================== @@ -101,10 +103,17 @@ BUILD_COMBO_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang +<<<<<<< HEAD BUILD_COMBO_motorcontrol_bissc = motorcontrol_bissc_r5f.ti-arm-clang # Combine all Components BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) $(BUILD_COMBO_motorcontrol_bissc) +======= +BUILD_COMBO_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang + +# Combine all Components +BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) $(BUILD_COMBO_pruicss_pwm) +>>>>>>> db822bd (am243x/am64x: pruio: add pwm driver) # Combine all Pre-built Components BUILD_COMBO_PREBUILT_ALL = @@ -130,8 +139,13 @@ $(BUILD_COMBO_motorcontrol_hdsl): $(BUILD_COMBO_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am243x.$(subst motorcontrol_tamagawa_,,$@) all +<<<<<<< HEAD $(BUILD_COMBO_motorcontrol_bissc): $(MAKE) -C source/position_sense/bissc -f makefile.am243x.$(subst motorcontrol_bissc_,,$@) all +======= +$(BUILD_COMBO_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am243x.$(subst pruicss_pwm_,,$@) all +>>>>>>> db822bd (am243x/am64x: pruio: add pwm driver) # Various Component Clean Targets @@ -139,10 +153,17 @@ BUILD_COMBO_CLEAN_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_clean +<<<<<<< HEAD BUILD_COMBO_CLEAN_motorcontrol_bissc = motorcontrol_bissc_r5f.ti-arm-clang_clean # Combine all Components Clean BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) $(BUILD_COMBO_CLEAN_motorcontrol_bissc) +======= +BUILD_COMBO_CLEAN_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_clean + +# Combine all Components Clean +BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) $(BUILD_COMBO_CLEAN_pruicss_pwm) +>>>>>>> db822bd (am243x/am64x: pruio: add pwm driver) # Combine all Pre-built Components Clean BUILD_COMBO_PREBUILT_CLEAN_ALL = @@ -163,8 +184,13 @@ $(BUILD_COMBO_CLEAN_motorcontrol_hdsl): $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am243x.$(subst motorcontrol_tamagawa_,,$(subst _clean,,$@)) clean +<<<<<<< HEAD $(BUILD_COMBO_CLEAN_motorcontrol_bissc): $(MAKE) -C source/position_sense/bissc -f makefile.am243x.$(subst motorcontrol_bissc_,,$(subst _clean,,$@)) clean +======= +$(BUILD_COMBO_CLEAN_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am243x.$(subst pruicss_pwm_,,$(subst _clean,,$@)) clean +>>>>>>> db822bd (am243x/am64x: pruio: add pwm driver) # Various Component Scrub Targets @@ -172,10 +198,17 @@ BUILD_COMBO_SCRUB_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_scrub_s BUILD_COMBO_SCRUB_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_scrub_scrub +<<<<<<< HEAD BUILD_COMBO_SCRUB_motorcontrol_bissc = motorcontrol_bissc_r5f.ti-arm-clang_scrub_scrub # Combine all Components Scrub Targets BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) $(BUILD_COMBO_SCRUB_motorcontrol_bissc) +======= +BUILD_COMBO_SCRUB_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_scrub_scrub + +# Combine all Components Scrub Targets +BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) $(BUILD_COMBO_SCRUB_pruicss_pwm) +>>>>>>> db822bd (am243x/am64x: pruio: add pwm driver) # Combine all Pre-built Components Scrub Targets BUILD_COMBO_PREBUILT_SCRUB_ALL = @@ -196,8 +229,13 @@ $(BUILD_COMBO_SCRUB_motorcontrol_hdsl): $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am243x.$(subst motorcontrol_tamagawa_,,$(subst _scrub,,$@)) scrub +<<<<<<< HEAD $(BUILD_COMBO_SCRUB_motorcontrol_bissc): $(MAKE) -C source/position_sense/bissc -f makefile.am243x.$(subst motorcontrol_bissc_,,$(subst _scrub,,$@)) scrub +======= +$(BUILD_COMBO_SCRUB_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am243x.$(subst pruicss_pwm_,,$(subst _scrub,,$@)) scrub +>>>>>>> db822bd (am243x/am64x: pruio: add pwm driver) BUILD_COMBO_EXAMPLE_ALL = diff --git a/makefile.am64x b/makefile.am64x index 5f5b2a4..f69a1a0 100644 --- a/makefile.am64x +++ b/makefile.am64x @@ -36,6 +36,7 @@ help: @echo $(MAKE) -s -f makefile.am64x motorcontrol_endat_r5f.ti-arm-clang @echo $(MAKE) -s -f makefile.am64x motorcontrol_hdsl_r5f.ti-arm-clang @echo $(MAKE) -s -f makefile.am64x motorcontrol_tamagawa_r5f.ti-arm-clang + @echo $(MAKE) -s -f makefile.am64x pruicss_pwm_r5f.ti-arm-clang @echo . @echo Library clean targets, @echo ====================== @@ -43,6 +44,7 @@ help: @echo $(MAKE) -s -f makefile.am64x motorcontrol_endat_r5f.ti-arm-clang_clean @echo $(MAKE) -s -f makefile.am64x motorcontrol_hdsl_r5f.ti-arm-clang_clean @echo $(MAKE) -s -f makefile.am64x motorcontrol_tamagawa_r5f.ti-arm-clang_clean + @echo $(MAKE) -s -f makefile.am64x pruicss_pwm_r5f.ti-arm-clang_clean @echo . @echo Example build targets, @echo ====================== @@ -78,9 +80,10 @@ BUILD_COMBO_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang +BUILD_COMBO_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang # Combine all Components -BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) +BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) $(BUILD_COMBO_pruicss_pwm) # Combine all Pre-built Components BUILD_COMBO_PREBUILT_ALL = @@ -106,15 +109,19 @@ $(BUILD_COMBO_motorcontrol_hdsl): $(BUILD_COMBO_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am64x.$(subst motorcontrol_tamagawa_,,$@) all +$(BUILD_COMBO_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am64x.$(subst pruicss_pwm_,,$@) all + # Various Component Clean Targets BUILD_COMBO_CLEAN_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_clean +BUILD_COMBO_CLEAN_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_clean # Combine all Components Clean -BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) +BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) $(BUILD_COMBO_CLEAN_pruicss_pwm) # Combine all Pre-built Components Clean BUILD_COMBO_PREBUILT_CLEAN_ALL = @@ -135,15 +142,19 @@ $(BUILD_COMBO_CLEAN_motorcontrol_hdsl): $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am64x.$(subst motorcontrol_tamagawa_,,$(subst _clean,,$@)) clean +$(BUILD_COMBO_CLEAN_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am64x.$(subst pruicss_pwm_,,$(subst _clean,,$@)) clean + # Various Component Scrub Targets BUILD_COMBO_SCRUB_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_scrub_scrub +BUILD_COMBO_SCRUB_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_scrub_scrub # Combine all Components Scrub Targets -BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) +BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) $(BUILD_COMBO_SCRUB_pruicss_pwm) # Combine all Pre-built Components Scrub Targets BUILD_COMBO_PREBUILT_SCRUB_ALL = @@ -164,6 +175,9 @@ $(BUILD_COMBO_SCRUB_motorcontrol_hdsl): $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am64x.$(subst motorcontrol_tamagawa_,,$(subst _scrub,,$@)) scrub +$(BUILD_COMBO_SCRUB_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am64x.$(subst pruicss_pwm_,,$(subst _scrub,,$@)) scrub + BUILD_COMBO_EXAMPLE_ALL = # Various Example Targets diff --git a/source/pruicss_pwm/.project/project.js b/source/pruicss_pwm/.project/project.js new file mode 100644 index 0000000..f6c2d16 --- /dev/null +++ b/source/pruicss_pwm/.project/project.js @@ -0,0 +1,14 @@ +function getComponentProperty(device) +{ + return require(`./project_${device}`).getComponentProperty(); +}; + +function getComponentBuildProperty(buildOption) +{ + return require(`./project_${buildOption.device}`).getComponentBuildProperty(buildOption); +}; + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/source/pruicss_pwm/.project/project_am243x.js b/source/pruicss_pwm/.project/project_am243x.js new file mode 100644 index 0000000..4f95f7a --- /dev/null +++ b/source/pruicss_pwm/.project/project_am243x.js @@ -0,0 +1,52 @@ +let path = require('path'); + +let device = "am243x"; + +const files = { + common: [ + "pruicss_pwm.c", + ], +}; + +const filedirs = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/driver", + ], +}; + +const includes = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include", + ], +}; + +const buildOptionCombos = [ + { device: device, cpu: "r5f", cgt: "ti-arm-clang"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "library"; + property.name = "pruicss_pwm"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.includes = includes; + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; \ No newline at end of file diff --git a/source/pruicss_pwm/.project/project_am64x.js b/source/pruicss_pwm/.project/project_am64x.js new file mode 100644 index 0000000..c9f1b32 --- /dev/null +++ b/source/pruicss_pwm/.project/project_am64x.js @@ -0,0 +1,52 @@ +let path = require('path'); + +let device = "am64x"; + +const files = { + common: [ + "pruicss_pwm.c", + ], +}; + +const filedirs = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/driver", + ], +}; + +const includes = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include", + ], +}; + +const buildOptionCombos = [ + { device: device, cpu: "r5f", cgt: "ti-arm-clang"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "library"; + property.name = "pruicss_pwm"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.includes = includes; + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; \ No newline at end of file diff --git a/source/pruicss_pwm/driver/pruicss_pwm.c b/source/pruicss_pwm/driver/pruicss_pwm.c new file mode 100644 index 0000000..9d783d0 --- /dev/null +++ b/source/pruicss_pwm/driver/pruicss_pwm.c @@ -0,0 +1,1354 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* ========================================================================== */ +/* Include Files */ +/* ========================================================================== */ + +#include +#include +#include +#include +#include +#include + +int32_t PRUICSS_setIepCounterLower_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint32_t value){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < 2) && (value < 0xFFFFFFFF)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_COUNT_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_COUNT_REG0_COUNT_LO, value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG0_COUNT_LO, value); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_setIepCounterUpper_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint32_t value){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < 2) && (value < 0xFFFFFFFF)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_COUNT_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_COUNT_REG1_COUNT_HI, value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG1_COUNT_HI, value); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_configureIepCmp0ResetEnable(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t enable) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < 2) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP_CFG_REG ), + CSL_ICSS_G_PR1_IEP0_SLV_CMP_CFG_REG_CMP0_RST_CNT_EN, enable); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG ), + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG_CMP0_RST_CNT_EN, enable); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_configureIepCompareEnable(PRUICSS_Handle handle, uint8_t iepInstance, uint16_t value){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < 2) && (value < 0xFFFF)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP_CFG_REG), + CSL_ICSS_G_PR1_IEP0_SLV_CMP_CFG_REG_CMP_EN, value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG), + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG_CMP_EN, value); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_setIepCompareEventLower_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t cmpEvent, uint32_t value){ + + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < 2) && (cmpEvent < 16)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + switch (cmpEvent) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP0_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP0_REG0_CMP0_0,(uint32_t)value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP1_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP1_REG0_CMP1_0,(uint32_t)value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP2_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP2_REG0_CMP2_0,(uint32_t)value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP3_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP3_REG0_CMP3_0,(uint32_t)value); + break; + case 4: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP4_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP4_REG0_CMP4_0,(uint32_t)value); + break; + case 5: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP5_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP5_REG0_CMP5_0,(uint32_t)value); + break; + case 6: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP6_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP6_REG0_CMP6_0,(uint32_t)value); + break; + case 7: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP7_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP7_REG0_CMP7_0,(uint32_t)value); + break; + case 8: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP8_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP8_REG0_CMP8_0,(uint32_t)value); + break; + case 9: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP9_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP9_REG0_CMP9_0,(uint32_t)value); + break; + case 10: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP10_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP10_REG0_CMP10_0,(uint32_t)value); + break; + case 11: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP11_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP11_REG0_CMP11_0,(uint32_t)value); + break; + case 12: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP12_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP12_REG0_CMP12_0,(uint32_t)value); + break; + case 13: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP13_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP13_REG0_CMP13_0,(uint32_t)value); + break; + case 14: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP14_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP14_REG0_CMP14_0,(uint32_t)value); + break; + case 15: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP15_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP15_REG0_CMP15_0,(uint32_t)value); + break; + } + break; + case 1: + switch (cmpEvent) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG0_CMP0_0,(uint32_t)value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP1_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP1_REG0_CMP1_0,(uint32_t)value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP2_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP2_REG0_CMP2_0,(uint32_t)value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG0_CMP3_0,(uint32_t)value); + break; + case 4: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP4_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP4_REG0_CMP4_0,(uint32_t)value); + break; + case 5: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG0_CMP5_0,(uint32_t)value); + break; + case 6: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG0_CMP6_0,(uint32_t)value); + break; + case 7: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP7_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP7_REG0_CMP7_0,(uint32_t)value); + break; + case 8: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP8_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP8_REG0_CMP8_0,(uint32_t)value); + break; + case 9: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP9_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP9_REG0_CMP9_0,(uint32_t)value); + break; + case 10: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP10_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP10_REG0_CMP10_0,(uint32_t)value); + break; + case 11: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP11_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP11_REG0_CMP11_0,(uint32_t)value); + break; + case 12: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP12_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP12_REG0_CMP12_0,(uint32_t)value); + break; + case 13: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP13_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP13_REG0_CMP13_0,(uint32_t)value); + break; + case 14: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP14_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP14_REG0_CMP14_0,(uint32_t)value); + break; + case 15: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP15_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP15_REG0_CMP15_0,(uint32_t)value); + break; + } + break; + } + + } + + return retVal; +} + + + +int32_t PRUICSS_setIepCompareEventUpper_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t cmpEvent, uint32_t value){ + + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < 2) && (cmpEvent < 16)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + switch (cmpEvent) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP0_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP0_REG1_CMP0_1,(uint32_t)value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP1_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP1_REG1_CMP1_1,(uint32_t)value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP2_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP2_REG1_CMP2_1,(uint32_t)value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP3_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP3_REG1_CMP3_1,(uint32_t)value); + break; + case 4: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP4_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP4_REG1_CMP4_1,(uint32_t)value); + break; + case 5: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP5_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP5_REG1_CMP5_1,(uint32_t)value); + break; + case 6: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP6_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP6_REG1_CMP6_1,(uint32_t)value); + break; + case 7: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP7_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP7_REG1_CMP7_1,(uint32_t)value); + break; + case 8: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP8_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP8_REG1_CMP8_1,(uint32_t)value); + break; + case 9: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP9_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP9_REG1_CMP9_1,(uint32_t)value); + break; + case 10: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP10_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP10_REG1_CMP10_1,(uint32_t)value); + break; + case 11: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP11_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP11_REG1_CMP11_1,(uint32_t)value); + break; + case 12: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP12_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP12_REG1_CMP12_1,(uint32_t)value); + break; + case 13: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP13_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP13_REG1_CMP13_1,(uint32_t)value); + break; + case 14: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP14_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP14_REG1_CMP14_1,(uint32_t)value); + break; + case 15: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP15_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP15_REG1_CMP15_1,(uint32_t)value); + break; + } + break; + case 1: + switch (cmpEvent) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG1_CMP0_1,(uint32_t)value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP1_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP1_REG1_CMP1_1,(uint32_t)value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP2_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP2_REG1_CMP2_1,(uint32_t)value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG1_CMP3_1,(uint32_t)value); + break; + case 4: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP4_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP4_REG1_CMP4_1,(uint32_t)value); + break; + case 5: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG1_CMP5_1,(uint32_t)value); + break; + case 6: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG1_CMP6_1,(uint32_t)value); + break; + case 7: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP7_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP7_REG1_CMP7_1,(uint32_t)value); + break; + case 8: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP8_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP8_REG1_CMP8_1,(uint32_t)value); + break; + case 9: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP9_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP9_REG1_CMP9_1,(uint32_t)value); + break; + case 10: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP10_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP10_REG1_CMP10_1,(uint32_t)value); + break; + case 11: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP11_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP11_REG1_CMP11_1,(uint32_t)value); + break; + case 12: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP12_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP12_REG1_CMP12_1,(uint32_t)value); + break; + case 13: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP13_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP13_REG1_CMP13_1,(uint32_t)value); + break; + case 14: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP14_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP14_REG1_CMP14_1,(uint32_t)value); + break; + case 15: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP15_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP15_REG1_CMP15_1,(uint32_t)value); + break; + } + break; + } + + } + + return retVal; +} + +int32_t PRUICSS_setPwmDebouceValue(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t value){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (value < 0xFF)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_DEBOUNCE_VALUE, value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_DEBOUNCE_VALUE, value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_DEBOUNCE_VALUE, value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_DEBOUNCE_VALUE, value); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_setPwmTripMask(PRUICSS_Handle handle, uint8_t pwmSet, uint16_t maskvalue){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (maskvalue <= 0x01FF)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_MASK, maskvalue); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_MASK, maskvalue); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_MASK, maskvalue); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_MASK, maskvalue); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_configurePwmCmp0TripResetEnable(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t enable){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_CMP0_EN, enable); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_CMP0_EN, enable); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_CMP0_EN, enable); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_CMP0_EN, enable); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_generatePwmTripReset(PRUICSS_Handle handle, uint8_t pwmSet){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_RESET, 1); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_RESET, 1); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_RESET, 1); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_RESET, 1); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_generatePwmOverCurrentErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_OVER_ERR_TRIP, 1); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_OVER_ERR_TRIP, 1); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_OVER_ERR_TRIP, 1); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_OVER_ERR_TRIP, 1); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_generatePwmPositionFeedbackErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_POS_ERR_TRIP, 1); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_POS_ERR_TRIP, 1); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_POS_ERR_TRIP, 1); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_POS_ERR_TRIP, 1); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_clearPwmTripResetStatus(PRUICSS_Handle handle, uint8_t pwmSet){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_RESET, 0); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_RESET, 0); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_RESET, 0); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_RESET, 0); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_clearPwmOverCurrentErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_OVER_ERR_TRIP, 0); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_OVER_ERR_TRIP, 0); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_OVER_ERR_TRIP, 0); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_OVER_ERR_TRIP, 0); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_clearPwmPositionFeedbackErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_POS_ERR_TRIP, 0); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_POS_ERR_TRIP, 0); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_POS_ERR_TRIP, 0); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_POS_ERR_TRIP, 0); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_getPwmTripTriggerCauseVector(PRUICSS_Handle handle, uint8_t pwmSet){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_VEC); + case 1: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_VEC); + case 2: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_VEC); + case 3: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_VEC); + } + } + + return retVal; +} + +int32_t PRUICSS_getPwmTripStatus(PRUICSS_Handle handle, uint8_t pwmSet){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_MASK); + case 1: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_MASK); + case 2: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_MASK); + case 3: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_MASK); + } + } + + return retVal; +} + +int32_t PRUICSS_clearPwmTripStatus(PRUICSS_Handle handle, uint8_t pwmSet){ + + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4)) + { + retVal = SystemP_SUCCESS; + retVal= PRUICSS_generatePwmTripReset(handle,pwmSet); + if(retVal == SystemP_SUCCESS) + { + PRUICSS_clearPwmTripResetStatus(handle,pwmSet); + } + } + + return retVal; +} + +int32_t PRUICCS_actionOnOutputCfgPwmSignalA0(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (state<3)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_POS_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_POS_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_POS_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_POS_TRIP, action); + break; + } + break; + + + } + } + + return retVal; +} + +int32_t PRUICCS_actionOnOutputCfgPwmSignalA1(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (state<3)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_NEG_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_NEG_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_NEG_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_NEG_TRIP, action); + break; + } + break; + + + } + } + + return retVal; +} + +int32_t PRUICCS_actionOnOutputCfgPwmSignalA2(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (state<3)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_POS_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_POS_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_POS_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_POS_TRIP, action); + break; + } + break; + } + } + + return retVal; +} + +int32_t PRUICCS_actionOnOutputCfgPwmSignalB0(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (state<3)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_NEG_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_NEG_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_NEG_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_NEG_TRIP, action); + break; + } + break; + } + } + + return retVal; +} + +int32_t PRUICCS_actionOnOutputCfgPwmSignalB1(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (state<3)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_POS_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_POS_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_POS_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_POS_TRIP, action); + break; + } + break; + } + } + + return retVal; +} + +int32_t PRUICCS_actionOnOutputCfgPwmSignalB2(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < 4) && (state<3)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_NEG_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_NEG_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_NEG_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_NEG_TRIP, action); + break; + } + break; + } + } + + return retVal; +} + +int32_t PRUICSS_configurePwmEfficiencyModeEnable(PRUICSS_Handle handle, uint8_t enable){ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PIN_MX),CSL_ICSSCFG_PIN_MX_PWM_EFC_EN, enable); + } + return retVal; +} diff --git a/source/pruicss_pwm/include/pruicss_pwm.h b/source/pruicss_pwm/include/pruicss_pwm.h new file mode 100644 index 0000000..9ae9fc6 --- /dev/null +++ b/source/pruicss_pwm/include/pruicss_pwm.h @@ -0,0 +1,389 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + * \defgroup PRUICSS_PWM_API APIs for PruIcss_pwm + * + * This module contains APIs for device driver pruicss_pwm supported in this SDK. + * + * PRUICSS has one pwm module, which has four pwm sets (PWM0, PWM1, PWM2, PWM3) + * Each Set has six signals (A0,A1,A2,B0,B1,B2) + * Each Set one trip zone output OR logic block, which has nine trip signals + * (trip_e1_[0:2], trip_e2, trip_e3[0:2], trip_e4, trip_e5) as input + * + * With Reference to Technical Reference Manual, Pwm six signals(A0,A1,A2,B0,B1,B2) Naming convention is slightly different + * + * PWMn==============>PWMn_0=========>PWMn_0_POS (alias signal A0) + * | |=====>PWMn_0_NEG (alias signal A1) + * | + * | + * | + * |=========>PWMn_1=========>PWMn_1_POS (alias signal A2) + * | |=====>PWMn_1_NEG (alias signal B0) + * | + * | + * | + * |=========>PWMn_2=========>PWMn_2_POS (alias signal B1) + * |=====>PWMn_2_NEG (alias signal B2) + * @{ + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* ========================================================================== */ +/* Include Files */ +/* ========================================================================== */ + +#ifndef PRUICSS_PWM_H_ +#define PRUICSS_PWM_H_ + +#include +#include +#include +#include +#include + +/* ========================================================================== */ +/* Macros & Typedefs */ +/* ========================================================================== */ + +/** + * \brief Return status when the API execution was successful + */ +#define SystemP_SUCCESS ((int32_t )0) + +/** + * \brief Return status when the API execution was not successful due to a failure. + */ +#define SystemP_FAILURE ((int32_t)-1) + + + +/* ========================================================================== */ +/* Function Declarations */ +/* ========================================================================== */ + +/** + * \brief This API writes Lower_32bitValue of IEP counter in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value iep count register Lower 32bit Value + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * + */ +int32_t PRUICSS_setIepCounterLower_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint32_t value); + +/** + * \brief This API writes Upper_32bitValue of IEP counter in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value iep count register Upper 32bit Value + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * + */ +int32_t PRUICSS_setIepCounterUpper_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint32_t value); + +/** + * \brief This API sets enables/disables of IEP counter reset on compare 0 event in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value Value to store in compare enable field of compare config register + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * + */ +int32_t PRUICSS_configureIepCmp0ResetEnable(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t enable); + +/** + * \brief This API sets enables/disables compare events in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value Value to store in compare enable field of compare config register + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * + */ +int32_t PRUICSS_configureIepCompareEnable(PRUICSS_Handle handle, uint8_t iepInstance, uint16_t value); + +/** + * \brief This API writes Lower_32bitValue of compare event in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value compare register Lower 32bit Value + * \param cmpEvent compare Event number. Maximum value allowed is 15 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * + */ +int32_t PRUICSS_setIepCompareEventLower_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t cmpEvent, uint32_t value); + +/** + * \brief This API writes Upper_32bitValue of compare event in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value compare register Upper 32bit Value + * \param cmpEvent compare Event number. Maximum value allowed is 15 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * + */ +int32_t PRUICSS_setIepCompareEventUpper_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t cmpEvent, uint32_t value); + +/** + * \brief This API updates Debounce Value for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param value pwmSet Debounce Value + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_setPwmDebouceValue(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t value); + +/** + * \brief This API updates TripMask Value for specified pwm set + * + * \brief Software TripMask + * \brief 0x0: PWM0_POS_ERR_TRIP (trip_e5) + * \brief 0x1: PWM0_OVER_ERR_TRIP (trip_e4) + * \brief 0x2: PWM0_0_SD_SHORT_ERR_TRIP (trip_e3_0) + * \brief 0x3: PWM0_1_SD_SHORT_ERR_TRIP (trip_e3_1) + * \brief 0x4: PWM0_2_SD_SHORT_ERR_TRIP (trip_e3_2) + * \brief 0x5: PWM0_DEBOUNCE_TRIP_IN (trip_e2) + * \brief 0x6: PWM0_0_DEBOUNCE_TRIP (trip_e1_0) + * \brief 0x7: PWM0_1_DEBOUNCE_TRIP (trip_e1_1) + * \brief 0x8: PWM0_2_DEBOUNCE_TRIP (trip_e1_2) + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param maskvalue pwmSet maskValue + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_setPwmTripMask(PRUICSS_Handle handle, uint8_t pwmSet, uint16_t maskvalue); + +/** + * \brief This API enables/disables TripReset on Compare_0 Event for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param value 0 for disable, 1 for enable + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_configurePwmCmp0TripResetEnable(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t enable); + +/** + * \brief This API generates Software Trip Reset by writing 1 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_generatePwmTripReset(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API generates Software Over current error trip by writing 1 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_generatePwmOverCurrentErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API generates Software Position Feedback Error Trip by writing 1 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_generatePwmPositionFeedbackErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API clears Software Trip Reset by writing 0 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_clearPwmTripResetStatus(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API clears Software Over current error trip by writing 0 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_clearPwmOverCurrentErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API clears Software Position Feedback Error Trip by writing 0 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_clearPwmPositionFeedbackErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API returns Trip trigger cause vector for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #Trip trigger cause vector on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_getPwmTripTriggerCauseVector(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API returns Trip status for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #Trip status on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_getPwmTripStatus(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API clears Trip status and makes state transition to Intial state as follows (Active->Intial) + * or (Trip->Intial) for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_clearPwmTripStatus(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API updates output action for specified state of A0 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICCS_actionOnOutputCfgPwmSignalA0(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of A1 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICCS_actionOnOutputCfgPwmSignalA1(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of A2 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICCS_actionOnOutputCfgPwmSignalA2(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of B0 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICCS_actionOnOutputCfgPwmSignalB0(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of B1 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICCS_actionOnOutputCfgPwmSignalB1(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of B2 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICCS_actionOnOutputCfgPwmSignalB2(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API enables Efficiency mode + * In Efficiency mode Pwm state machine will go from Idle to + * Active and the same time Pwm output will get updated during this + * state transition And Iep Cmp flags will get auto HW cleared + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param enable 0 for disable, 1 for enable + * \return #SystemP_SUCCESS on success, #SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_configurePwmEfficiencyModeEnable(PRUICSS_Handle handle, uint8_t enable); + +#ifdef __cplusplus +} +#endif + +#endif/* #ifndef PRUICSS_PWM_H_ */ \ No newline at end of file diff --git a/source/pruicss_pwm/makefile.am243x.r5f.ti-arm-clang b/source/pruicss_pwm/makefile.am243x.r5f.ti-arm-clang new file mode 100644 index 0000000..98cc215 --- /dev/null +++ b/source/pruicss_pwm/makefile.am243x.r5f.ti-arm-clang @@ -0,0 +1,119 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CGT_TI_ARM_CLANG_PATH)/bin/tiarmclang +AR=$(CGT_TI_ARM_CLANG_PATH)/bin/tiarmar + +PROFILE?=release +ConfigName:=$(PROFILE) + +LIBNAME:=pruicss_pwm.am243x.r5f.ti-arm-clang.$(PROFILE).lib + +FILES_common := \ + pruicss_pwm.c \ + +FILES_PATH_common = \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/driver \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +ARFLAGS_common := \ + rc \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +ASMFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +ifeq ($(CPLUSPLUS_BUILD), yes) +CFLAGS += $(CFLAGS_cpp_common) +endif +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +ARFLAGS := $(ARFLAGS_common) $(ARFLAGS_$(PROFILE)) + +LIBDIR := lib +OBJDIR := obj/am243x/ti-arm-clang/$(PROFILE)/r5f/pruicss_pwm/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: $(LIBNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: $(LIBNAME): $< + $(CC) -c $(ASMFLAGS) -o $(OBJDIR)/$@ $< + +all: $(LIBDIR)/$(LIBNAME) + +$(LIBDIR)/$(LIBNAME): $(OBJS) | $(LIBDIR) + @echo . + @echo Archiving: $(LIBNAME) to $@ ... + $(AR) $(ARFLAGS) $@ $(addprefix $(OBJDIR), $(OBJS)) + @echo Archiving: $(LIBNAME) Done !!! + @echo . + +clean: + @echo Cleaning: $(LIBNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(LIBDIR)/$(LIBNAME) + +scrub: + @echo Scrubing: $(LIBNAME) ... + -$(RMDIR) obj/ + -$(RMDIR) lib/ + +$(OBJS): | $(OBJDIR) + +$(LIBDIR) $(OBJDIR): + $(MKDIR) $@ + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/source/pruicss_pwm/makefile.am64x.r5f.ti-arm-clang b/source/pruicss_pwm/makefile.am64x.r5f.ti-arm-clang new file mode 100644 index 0000000..f0e4101 --- /dev/null +++ b/source/pruicss_pwm/makefile.am64x.r5f.ti-arm-clang @@ -0,0 +1,119 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CGT_TI_ARM_CLANG_PATH)/bin/tiarmclang +AR=$(CGT_TI_ARM_CLANG_PATH)/bin/tiarmar + +PROFILE?=release +ConfigName:=$(PROFILE) + +LIBNAME:=pruicss_pwm.am64x.r5f.ti-arm-clang.$(PROFILE).lib + +FILES_common := \ + pruicss_pwm.c \ + +FILES_PATH_common = \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/driver \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + +DEFINES_common := \ + -DSOC_AM64X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +ARFLAGS_common := \ + rc \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +ASMFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +ifeq ($(CPLUSPLUS_BUILD), yes) +CFLAGS += $(CFLAGS_cpp_common) +endif +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +ARFLAGS := $(ARFLAGS_common) $(ARFLAGS_$(PROFILE)) + +LIBDIR := lib +OBJDIR := obj/am64x/ti-arm-clang/$(PROFILE)/r5f/pruicss_pwm/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: $(LIBNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: $(LIBNAME): $< + $(CC) -c $(ASMFLAGS) -o $(OBJDIR)/$@ $< + +all: $(LIBDIR)/$(LIBNAME) + +$(LIBDIR)/$(LIBNAME): $(OBJS) | $(LIBDIR) + @echo . + @echo Archiving: $(LIBNAME) to $@ ... + $(AR) $(ARFLAGS) $@ $(addprefix $(OBJDIR), $(OBJS)) + @echo Archiving: $(LIBNAME) Done !!! + @echo . + +clean: + @echo Cleaning: $(LIBNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(LIBDIR)/$(LIBNAME) + +scrub: + @echo Scrubing: $(LIBNAME) ... + -$(RMDIR) obj/ + -$(RMDIR) lib/ + +$(OBJS): | $(OBJDIR) + +$(LIBDIR) $(OBJDIR): + $(MKDIR) $@ + +-include $(addprefix $(OBJDIR)/, $(DEPS))