diff --git a/.metadata/.tirex/am243x.content.tirex.json b/.metadata/.tirex/am243x.content.tirex.json index 7ab74a1..eff71d4 100644 --- a/.metadata/.tirex/am243x.content.tirex.json +++ b/.metadata/.tirex/am243x.content.tirex.json @@ -876,6 +876,38 @@ ] ] }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Pruicss Pwm Epwm Sync Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "pruicss_pwm_epwm_sync", + "location": "../../examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "pruicss_pwm", + "pruicss_pwm_epwm_sync", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "web.page", "resourceClass": [ diff --git a/.project/device/project_am243x.js b/.project/device/project_am243x.js index 311d604..6a894e7 100644 --- a/.project/device/project_am243x.js +++ b/.project/device/project_am243x.js @@ -30,8 +30,8 @@ const example_file_list = [ "examples/position_sense/bissc_diagnostic/multi_channel_single_pru/.project/project.js", "examples/current_sense/icss_sdfm/.project/project.js", "examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/.project/project.js", - "examples/pruicss_pwm/.project/project.js", "examples/pruicss_pwm/pruicss_pwm_duty_cycle/.project/project.js", + "examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project.js", "source/current_sense/sdfm/firmware/.project/project.js", "source/position_sense/endat/firmware/multi_channel_load_share/.project/project.js", "source/position_sense/endat/firmware/single_channel/.project/project.js", diff --git a/.project/device/project_am64x.js b/.project/device/project_am64x.js index 9c091f2..39d8ac4 100644 --- a/.project/device/project_am64x.js +++ b/.project/device/project_am64x.js @@ -22,9 +22,6 @@ const example_file_list = [ "examples/position_sense/hdsl_diagnostic/single_channel/.project/project.js", "examples/position_sense/tamagawa_diagnostic/multi_channel/.project/project.js", "examples/position_sense/tamagawa_diagnostic/single_channel/.project/project.js", - "examples/pruicss_pwm/.project/project.js", - "examples/position_sense/tamagawa_diagnostic/single_channel/.project/project.js", - "examples/current_sense/icss_sdfm/.project/project.js", "examples/pruicss_pwm/pruicss_pwm_duty_cycle/.project/project.js", "source/current_sense/sdfm/firmware/.project/project.js", "source/position_sense/endat/firmware/multi_channel_load_share/.project/project.js", diff --git a/docs_src/docs/api_guide/device/am243x/examples.cfg b/docs_src/docs/api_guide/device/am243x/examples.cfg index c394f81..4c1e872 100644 --- a/docs_src/docs/api_guide/device/am243x/examples.cfg +++ b/docs_src/docs/api_guide/device/am243x/examples.cfg @@ -6,4 +6,5 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_example. INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/bissc_example.md INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md -INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/pruicss_pwm.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/pruicss_pwm_dutycycle.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/pruicss_pwm_epwm_sync.md diff --git a/docs_src/docs/api_guide/device/am64x/examples.cfg b/docs_src/docs/api_guide/device/am64x/examples.cfg index affa5bd..5717736 100644 --- a/docs_src/docs/api_guide/device/am64x/examples.cfg +++ b/docs_src/docs/api_guide/device/am64x/examples.cfg @@ -3,4 +3,4 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/hdsl_example. INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/endat_example.md INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_example.md INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_example.md -INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/pruicss_pwm.md \ No newline at end of file +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/pruicss_pwm_dutycycle.md \ No newline at end of file diff --git a/docs_src/docs/api_guide/examples/examples.md b/docs_src/docs/api_guide/examples/examples.md index 510befc..a70b6ee 100644 --- a/docs_src/docs/api_guide/examples/examples.md +++ b/docs_src/docs/api_guide/examples/examples.md @@ -25,6 +25,7 @@ This page lists all the examples and demos supported in this SDK. -# \subpage EXAMPLES_DCL_DF22 - PRUICSS PWM -# \subpage EXAMPLE_PRUICSS_PWM_DUTY_CYCLE + -# \subpage EXAMPLE_PRUICSS_PWM_EPWM_SYNC \endcond \cond SOC_AM263X diff --git a/docs_src/docs/api_guide/examples/pruicss_pwm.md b/docs_src/docs/api_guide/examples/pruicss_pwm_dutycycle.md similarity index 91% rename from docs_src/docs/api_guide/examples/pruicss_pwm.md rename to docs_src/docs/api_guide/examples/pruicss_pwm_dutycycle.md index 09b36b7..1fd9469 100644 --- a/docs_src/docs/api_guide/examples/pruicss_pwm.md +++ b/docs_src/docs/api_guide/examples/pruicss_pwm_dutycycle.md @@ -17,6 +17,7 @@ The example Uses PRUICSSG1 PWM module and does below - PWM0_2_NEG(alias signal PWM0_B2) uses IEP0 CMP6 EVENT to control Duty cycle and IEP0 CMP0 to control output Frequency - Configures IEP0 CMP0 value with PWM0_2_NEG(alias signal PWM0_B2) output period value - Configures IEP0 CMP6 value with PWM0_2_NEG(alias signal PWM0_B2) output duty cycle value +- Configures IEP counter reset on CMP0 event - PRG1_PWM0_B2 can be probed on J16 PIN1 #### AM243X-EVM Probe Output @@ -31,8 +32,9 @@ The example Uses PRUICSSG0 PWM module and does below - PWM0_0_POS(alias signal PWM0_A0) uses IEP0 CMP1 EVENT to control Duty cycle and IEP0 CMP0 to control output Frequency - PWM3_2_NEG(alias signal PWM3_B2) uses IEP1 CMP12 EVENT to control Duty cycle and IEP0 CMP0 to control output Frequency - Configures IEP0 CMP0 value with PWM0_0_POS(alias signal PWM0_A0) and PWM3_2_NEG(alias signal PWM3_B2) output period value +- Configures IEP counter reset on CMP0 event - Configures IEP0 CMP6 value with PWM0_0_POS(alias signal PWM0_A0) output duty cycle value -- Configures IEP1 CMP12 value with PWM0_0_POS(alias signal PWM0_A0) output duty cycle value +- Configures IEP1 CMP12 value with PWM3_2_NEG(alias signal PWM3_B2) output duty cycle value - PWM0_0_POS(alias signal PWM0_A0) and PWM3_2_NEG(alias signal PWM3_B2) will be in sync with respect to each other as IEP0 CMP0 value is used to control output period of these signals - PRG0_PWM0_A0 can be probed on J1.5 - PRG0_PWM3_B2 can be probed on J2.8 @@ -52,6 +54,7 @@ The example Uses PRUICSSG1 PWM module and does below - PWM0_2_NEG(alias signal PWM0_B2) uses IEP0 CMP6 EVENT to control Duty cycle and IEP0 CMP0 to control output Frequency - Configures IEP0 CMP0 value with PWM0_2_NEG(alias signal PWM0_B2) output period value - Configures IEP0 CMP6 value with PWM0_2_NEG(alias signal PWM0_B2) output duty cycle value +- Configures IEP counter reset on CMP0 event - PRG1_PWM0_B2 can be probed on J16 PIN1 #### AM64X-EVM Probe Output @@ -61,7 +64,7 @@ The example Uses PRUICSSG1 PWM module and does below \endcond -# Supported Combinations {#EXAMPLES_DRIVERS_EPWM_DUTY_CYCLE_COMBOS} +# Supported Combinations \cond SOC_AM64X @@ -70,7 +73,7 @@ The example Uses PRUICSSG1 PWM module and does below CPU + OS | r5fss0-0 freertos Toolchain | ti-arm-clang Board | @VAR_BOARD_NAME_LOWER - Example folder | examples/drivers/epwm/epwm_duty_cycle/ + Example folder | examples/pruicss_pwm/pruicss_pwm_dutycycle \endcond @@ -81,7 +84,7 @@ The example Uses PRUICSSG1 PWM module and does below CPU + OS | r5fss0-0 freertos Toolchain | ti-arm-clang Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER - Example folder | examples/drivers/epwm/epwm_duty_cycle/ + Example folder | examples/pruicss_pwm/pruicss_pwm_dutycycle \endcond diff --git a/docs_src/docs/api_guide/examples/pruicss_pwm_epwm_sync.md b/docs_src/docs/api_guide/examples/pruicss_pwm_epwm_sync.md new file mode 100644 index 0000000..96e9c0b --- /dev/null +++ b/docs_src/docs/api_guide/examples/pruicss_pwm_epwm_sync.md @@ -0,0 +1,62 @@ +# PRUICSS PWM EPWM SYNC {#EXAMPLE_PRUICSS_PWM_EPWM_SYNC} + +[TOC] + +# Introduction + +This example generates a signal for a specified time and duty cycle using +PRUICSS PWM and SOC EPWM. The time and duty cycle can be configured by the user. + +\cond SOC_AM243X + +## AM243X-LP +The example Uses PRUICSSG0 PWM module and does below + +- Configures EPWM0_CHANNEL_A to generate a 1KHz signal with 25% duty cycle +- Configures EPWM0_SYNC_OUT to output high when SOC EPWM PERIOD VAL reaches zero +- Configures IEP counter reset on EPWM0_SYNC_OUT event +- Configures PWM0_0_POS(alias signal PWM0_A0) to generate a 1KHz signal with 50% duty cycle +- Configures PWM3_2_NEG(alias signal PWM3_B2) to generate a 1KHz signal with 75% duty cycle +- PWM0_0_POS(alias signal PWM0_A0) uses IEP0 CMP1 EVENT to control Duty cycle and EPWM0 SYNC OUT to control output Frequency +- PWM3_2_NEG(alias signal PWM3_B2) uses IEP1 CMP12 EVENT to control Duty cycle and EPWM0 SYNC OUT to control output Frequency +- Configures IEP0 CMP6 value with PWM0_0_POS(alias signal PWM0_A0) output duty cycle value +- Configures IEP1 CMP12 value with PWM3_2_NEG(alias signal PWM3_B2) output duty cycle value +- Configures IEP0 CMP0 value with zero to make state transition to intial on IEP counter reset +- PWM0_0_POS(alias signal PWM0_A0) and PWM3_2_NEG(alias signal PWM3_B2) and EPWM0_CHANNEL_A will be in sync with respect to each other as EPWM0_SYNC_OUT is used to control output period of these signals +- PRG0_PWM0_A0 can be probed on J1.5 +- PRG0_PWM3_B2 can be probed on J2.8 +- EPWM0_CHANNEL_A can be probed on J4.1 + +#### AM243X-LP Probe Output +\imageStyle{am243x_lp_soc_epwm_pruicss_pwm_sync_probe_output.png,width:85%} +\image html am243x_lp_soc_epwm_pruicss_pwm_sync_probe_output.png "PRUICSS PWM EPWM SYNC PROBE OUTPUT" + +\endcond + +# Supported Combinations + +\cond SOC_AM243X + + Parameter | Value + ---------------|----------- + CPU + OS | r5fss0-0 freertos + Toolchain | ti-arm-clang + Boards | @VAR_LP_BOARD_NAME_LOWER + Example folder | examples/pruicss_pwm/pruicss_pwm_epwm_sync + +\endcond + +# Steps to Run the Example + +- **When using CCS projects to build**, import the CCS project for the required combination + and build it using the CCS project menu (see Using SDK with CCS Projects ). +- **When using makefiles to build**, note the required combination and build using + make command (see Using SDK with Makefiles ) +- Launch a CCS debug session and run the executable, see CCS Launch, Load and Run +- To probe the PRUICSS PWM output please refer setup details as mentioned above in Introduction section + +# See Also + +\ref PRUICSS_PWM_API + + diff --git a/docs_src/docs/api_guide/images/pruicss_pwm/am243x_lp_soc_epwm_pruicss_pwm_sync_probe_output.png b/docs_src/docs/api_guide/images/pruicss_pwm/am243x_lp_soc_epwm_pruicss_pwm_sync_probe_output.png new file mode 100644 index 0000000..eaa84d3 Binary files /dev/null and b/docs_src/docs/api_guide/images/pruicss_pwm/am243x_lp_soc_epwm_pruicss_pwm_sync_probe_output.png differ diff --git a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs index 472ab38..c2be5da 100644 --- a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs +++ b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -4,5 +4,5 @@ * View (ROV) tool. */ var crovFiles = [ - "kernel/freertos/rov/FreeRTOS.rov.js", + "mcu_plus_sdk/kernel/freertos/rov/FreeRTOS.rov.js", ]; diff --git a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs index 472ab38..c2be5da 100644 --- a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs +++ b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -4,5 +4,5 @@ * View (ROV) tool. */ var crovFiles = [ - "kernel/freertos/rov/FreeRTOS.rov.js", + "mcu_plus_sdk/kernel/freertos/rov/FreeRTOS.rov.js", ]; diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project.js b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project.js new file mode 100644 index 0000000..f6c2d16 --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project.js @@ -0,0 +1,14 @@ +function getComponentProperty(device) +{ + return require(`./project_${device}`).getComponentProperty(); +}; + +function getComponentBuildProperty(buildOption) +{ + return require(`./project_${buildOption.device}`).getComponentBuildProperty(buildOption); +}; + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project_am243x.js b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project_am243x.js new file mode 100644 index 0000000..3eddb53 --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project_am243x.js @@ -0,0 +1,121 @@ +let path = require('path'); + +let device = "am243x"; + +const files = { + common: [ + "main.c", + "pruicss_pwm_epwm_sync.c" + ], +}; + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", /* Example base */ + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib" + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include" + + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + + + +const lnkfiles = { + common: [ + "linker.cmd", + ] +}; + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLE_PRUICSS_PWM_EPWM_SYNC"; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am243x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "pruicss_pwm_epwm_sync_main", + }, + } +]; + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "pruicss_pwm_epwm_sync"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + property.isSkipTopLevelBuild = false; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.lnkfiles = lnkfiles; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + + if(buildOption.cpu.match(/r5f*/)) { + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..5a18d00 --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,76 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" + * @versions {"tool":"1.18.0+3266"} + */ + +/** + * Import the modules used in this configuration. + */ +const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false); +const epwm1 = epwm.addInstance(); +const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); +const pruicss1 = pruicss.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +epwm1.$name = "CONFIG_EPWM0"; +epwm1.EPWM.$assign = "EHRPWM0"; +epwm1.EPWM.B.$used = false; +epwm1.EPWM.SYNCO.$used = false; +epwm1.EPWM.SYNCI.$used = false; + +pruicss1.$name = "CONFIG_PRU_ICSS0"; +pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false); +const uart_v0_template1 = uart_v0_template.addInstance({}, false); +uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0"; +debug_log.uartLog.child = uart_v0_template1; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +epwm1.EPWM.A.$suggestSolution = "GPMC0_AD3"; +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/main.c b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..c9ab9b3 --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void pruicss_pwm_epwm_sync_main(void *args); + +void freertos_main(void *args) +{ + pruicss_pwm_epwm_sync_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/pruicss_pwm_epwm_sync.c b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/pruicss_pwm_epwm_sync.c new file mode 100644 index 0000000..9ec1d32 --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/pruicss_pwm_epwm_sync.c @@ -0,0 +1,257 @@ +/* + * Copyright (C) 2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include "ti_drivers_config.h" +#include "ti_drivers_open_close.h" +#include "ti_board_open_close.h" +#include +#include +#include + +/* Frequency of PWM output signal in Hz - 1 KHz is selected */ +#define SOC_EPWM_OUTPUT_FREQ (1U * 1000U) +/* TB frequency in Hz - so that /4 divider is used */ +#define SOC_EPWM_TB_FREQ (CONFIG_EPWM0_FCLK / 4U) +/* PRD value - this determines the period */ +#define SOC_EPWM_PRD_VAL (SOC_EPWM_TB_FREQ / SOC_EPWM_OUTPUT_FREQ) +/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */ +#define SOC_EPWM_DUTY_CYCLE (25U) +/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/ +#define SOC_EPWM_COMPA_VAL (SOC_EPWM_PRD_VAL - ((SOC_EPWM_DUTY_CYCLE *SOC_EPWM_PRD_VAL) / 100U)) + +/*FIXME: IEP0_CLK_FREQ macro to be included in driver_config.h sysconfig generated file*/ +#define PRUICSS_IEP0_CLK_FREQ (200000000U) +/* Modify this to change the IEP counter increment value*/ +#define PRUICSS_IEP_COUNT_INCREMENT_VALUE (5U) +/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */ +#define APP_PRUICSS_PWM0_A0_DUTY_CYCLE (50U) +/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */ +#define APP_PRUICSS_PWM3_B2_DUTY_CYCLE (75U) +/* Frequency of PWM output signal in Hz - 1 KHz is selected */ +#define APP_PRUICSS_PWM_OUTPUT_FREQ (SOC_EPWM_OUTPUT_FREQ) +/* PRD value - this determines the period */ +#define APP_PRUICSS_PWM_PRD_VAL (((PRUICSS_IEP0_CLK_FREQ / APP_PRUICSS_PWM_OUTPUT_FREQ))*(PRUICSS_IEP_COUNT_INCREMENT_VALUE)) +/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/ +#define APP_PRUICSS_IEP0_COMP1_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM0_A0_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100)) +/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/ +#define APP_PRUICSS_IEP1_COMP12_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM3_B2_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100)) + +/*FIXME: Add pinmux in sysconfig generated file*/ +Pinmux_PerCfg_t gPinMuxMainDomainCfg1[] = { + + /* PRU_ICSSG0_PWM0 pin config */ + /* PRG0_PWM0_A0 -> PRG0_PRU0_GPO12 (K1) */ + { + PIN_PRG0_PRU0_GPO12, + ( PIN_MODE(3) | PIN_PULL_DISABLE ) + }, + /* PRU_ICSSG0_PWM3 pin config */ + /* PRG0_PWM3_B2 -> PRG0_PRU0_GPO5 (F2) */ + { + PIN_PRG0_PRU0_GPO5, + ( PIN_MODE(3) | PIN_PULL_DISABLE ) + }, + {PINMUX_END, PINMUX_END} + +}; + +/* Function Prototypes */ +static void App_epwmConfig(uint32_t epwmBaseAddr, uint32_t epwmCh, uint32_t epwmFuncClk); +static void pruicss_iep_init(void *args); +static void pruicss_pwm_init(void *args); + +/* variable to hold base address of EPWM that is used */ +uint32_t gEpwmBaseAddr; + +/* Global Structure pointer holding PRUICSSG0 memory Map. */ +PRUICSS_Handle gPruIcssHandle; + +void pruicss_pwm_epwm_sync_main(void *args) +{ + + /* Open drivers to open the UART driver for console */ + Drivers_open(); + Board_driversOpen(); + + gPruIcssHandle = PRUICSS_open(CONFIG_PRU_ICSS0); + DebugP_assert(gPruIcssHandle != NULL); + + Pinmux_config(gPinMuxMainDomainCfg1, PINMUX_DOMAIN_ID_MAIN); + + pruicss_pwm_init(NULL); + + pruicss_iep_init(NULL); + + /* Address translate */ + gEpwmBaseAddr = (uint32_t)AddrTranslateP_getLocalAddr(CONFIG_EPWM0_BASE_ADDR); + + /* Configure SOC EPWM */ + App_epwmConfig(gEpwmBaseAddr, EPWM_OUTPUT_CH_A, CONFIG_EPWM0_FCLK); + + while (1) + { + ClockP_usleep(1); + } + + Board_driversClose(); + Drivers_close(); +} + +static void App_epwmConfig(uint32_t epwmBaseAddr, uint32_t epwmCh, uint32_t epwmFuncClk) +{ + EPWM_AqActionCfg aqConfig; + + /* Configure Time base submodule */ + EPWM_tbTimebaseClkCfg(epwmBaseAddr, SOC_EPWM_TB_FREQ, epwmFuncClk); + EPWM_tbPwmFreqCfg(epwmBaseAddr, SOC_EPWM_TB_FREQ, SOC_EPWM_OUTPUT_FREQ, EPWM_TB_COUNTER_DIR_UP, EPWM_SHADOW_REG_CTRL_ENABLE); + EPWM_tbSyncDisable(epwmBaseAddr); + EPWM_tbSetSyncOutMode(epwmBaseAddr, EPWM_TB_SYNC_OUT_EVT_CNT_EQ_ZERO); + EPWM_tbSetEmulationMode(epwmBaseAddr, EPWM_TB_EMU_MODE_FREE_RUN); + + /* Configure counter compare submodule */ + EPWM_counterComparatorCfg(epwmBaseAddr, EPWM_CC_CMP_A, SOC_EPWM_COMPA_VAL, EPWM_SHADOW_REG_CTRL_ENABLE, EPWM_CC_CMP_LOAD_MODE_CNT_EQ_ZERO, TRUE); + + /* Configure Action Qualifier Submodule */ + aqConfig.zeroAction = EPWM_AQ_ACTION_LOW; + aqConfig.prdAction = EPWM_AQ_ACTION_DONOTHING; + aqConfig.cmpAUpAction = EPWM_AQ_ACTION_HIGH; + aqConfig.cmpADownAction = EPWM_AQ_ACTION_DONOTHING; + aqConfig.cmpBUpAction = EPWM_AQ_ACTION_DONOTHING; + aqConfig.cmpBDownAction = EPWM_AQ_ACTION_DONOTHING; + EPWM_aqActionOnOutputCfg(epwmBaseAddr, epwmCh, &aqConfig); + + /* Configure Dead Band Submodule */ + EPWM_deadbandBypass(epwmBaseAddr); + + /* Configure Chopper Submodule */ + EPWM_chopperEnable(epwmBaseAddr, FALSE); + + /* Configure trip zone Submodule */ + EPWM_tzTripEventDisable(epwmBaseAddr, EPWM_TZ_EVENT_ONE_SHOT, 0U); + EPWM_tzTripEventDisable(epwmBaseAddr, EPWM_TZ_EVENT_CYCLE_BY_CYCLE, 0U); + + /* Configure event trigger Submodule */ + EPWM_etIntrCfg(epwmBaseAddr, EPWM_ET_INTR_EVT_CNT_EQ_ZRO, EPWM_ET_INTR_PERIOD_FIRST_EVT); + EPWM_etIntrEnable(epwmBaseAddr); +} + +static void pruicss_iep_init(void *args) +{ + + int status; + /*Disable IEP0 counter*/ + status= PRUICSS_controlIepCounter(gPruIcssHandle, PRUICSS_IEP_INST0, 0); + DebugP_assert(SystemP_SUCCESS == status); + + status = PRUICSS_PWM_enableIEPResetOnEPWM0SyncOut(gPruIcssHandle, PRUICSS_IEP_INST0, 1); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable IEP1 slave mode*/ + status = PRUICSS_PWM_enableIEP1Slave(gPruIcssHandle, 1); + DebugP_assert(SystemP_SUCCESS == status); + + /*Intialize IEP0 count value*/ + PRUICSS_PWM_setIepCounterLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, 0xFFFFFFFF); + PRUICSS_PWM_setIepCounterUpper_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, 0xFFFFFFFF); + + /*FIXME: Either compare event is not hit or no state transition when compare 0 configured with 0x00000000*/ + /*configure cmp 0 value of IEP0 with APP_PRUICSS_PWM_PRD_VAL*/ + status = PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, CMP_EVENT0, ((0x00000001) & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure cmp 1 value with APP_PRUICSS_IEP0_COMP1_VAL*/ + status = PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, CMP_EVENT1, (APP_PRUICSS_IEP0_COMP1_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure cmp 12 value with APP_PRUICSS_IEP1_COMP12_VAL*/ + status = PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST1, CMP_EVENT12, (APP_PRUICSS_IEP1_COMP12_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp 0 and cmp 1 of IEP0*/ + status = PRUICSS_PWM_configureIepCompareEnable(gPruIcssHandle, PRUICSS_IEP_INST0, 0x3); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp12 of IEP1*/ + status = PRUICSS_PWM_configureIepCompareEnable(gPruIcssHandle, PRUICSS_IEP_INST1, 0x1000); + DebugP_assert(SystemP_SUCCESS == status); + + /*Set IEP0 counter Increment value*/ + status = PRUICSS_setIepCounterIncrementValue(gPruIcssHandle, PRUICSS_IEP_INST0, PRUICSS_IEP_COUNT_INCREMENT_VALUE); + DebugP_assert(SystemP_SUCCESS == status); + + /*Disable cmp 0 reset of IEP0 counter*/ + status = PRUICSS_PWM_configureIepCmp0ResetEnable(gPruIcssHandle, PRUICSS_IEP_INST0, 0x0); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable IEP0 counter*/ + status = PRUICSS_controlIepCounter(gPruIcssHandle, PRUICSS_IEP_INST0, 1); + DebugP_assert(SystemP_SUCCESS == status); + +} + +static void pruicss_pwm_init(void *args){ + + int status; + /*Enable IEP CMP flags to auto clear after state transition*/ + status = PRUICSS_PWM_configurePwmEfficiencyModeEnable(gPruIcssHandle, 1); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable compare0 trip reset of set 0*/ + status = PRUICSS_PWM_configurePwmCmp0TripResetEnable(gPruIcssHandle, PRUICSS_PWM_SET0, 1); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable compare0 trip reset of set 3 */ + status = PRUICSS_PWM_configurePwmCmp0TripResetEnable(gPruIcssHandle, PRUICSS_PWM_SET3, 1); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure PWM B2 signal of set 0, intial state to low*/ + status = PRUICSS_PWM_actionOnOutputCfgPwmSignalA0(gPruIcssHandle, PRUICSS_PWM_SET0, PRUICSS_PWM_INTIAL_STATE,1); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure PWM B2 signal of set 0, active state to high*/ + status = PRUICSS_PWM_actionOnOutputCfgPwmSignalA0(gPruIcssHandle, PRUICSS_PWM_SET0, PRUICSS_PWM_ACTIVE_STATE,2); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure PWM B2 signal of set 0, intial state to low*/ + status = PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle, PRUICSS_PWM_SET3, PRUICSS_PWM_INTIAL_STATE,1); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure PWM B2 signal of set 0, active state to high*/ + status = PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle, PRUICSS_PWM_SET3, PRUICSS_PWM_ACTIVE_STATE,2); + DebugP_assert(SystemP_SUCCESS == status); +} + diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..b248fdd --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,115 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..290c04a --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,309 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=pruicss_pwm_epwm_sync.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=pruicss_pwm_epwm_sync.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=pruicss_pwm_epwm_sync.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=pruicss_pwm_epwm_sync.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=pruicss_pwm_epwm_sync.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=pruicss_pwm_epwm_sync.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + main.c \ + pruicss_pwm_epwm_sync.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0 \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lpruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang pruicss_pwm_epwm_sync ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..eb2fa40 --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..c2be5da --- /dev/null +++ b/examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "mcu_plus_sdk/kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/makefile.am243x b/makefile.am243x index fa9230a..1c9820e 100644 --- a/makefile.am243x +++ b/makefile.am243x @@ -77,6 +77,7 @@ help: @echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-rtupru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @@ -247,6 +248,7 @@ BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_three_channel_with_phase_compensation_am243 BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang # Various System Example Targets BUILD_COMBO_EXAMPLE_PRIVATE_ALL = @@ -358,6 +360,9 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL) pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang: $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all + pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all @@ -448,6 +453,7 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_three_channel_with_phase_compensation BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean # Various System Example Clean Targets BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL = @@ -559,6 +565,9 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL) pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean + pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean @@ -649,6 +658,7 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_three_channel_with_phase_compensation BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub # Various System Example Scrub Targets BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL = @@ -760,6 +770,9 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL) pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub diff --git a/makefile_projectspec.am243x b/makefile_projectspec.am243x index 314a724..f4cdbfd 100644 --- a/makefile_projectspec.am243x +++ b/makefile_projectspec.am243x @@ -34,6 +34,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_three_channel_with_phase_ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build # Various System Example Projectspec Build Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL = @@ -145,6 +146,9 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL) pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build: $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_build: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all @@ -236,6 +240,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_three_channel_with_phase_ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean # Various System Example Projectspec Clean Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL = @@ -347,6 +352,9 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL) pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean @@ -438,6 +446,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_three_channel_with_phase BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export # Various System Example Projectspec Export Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL = @@ -549,6 +558,9 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL) pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export: $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_export: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export @@ -665,6 +677,7 @@ help: @echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-rtupru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean] diff --git a/source/pruicss_pwm/driver/pruicss_pwm.c b/source/pruicss_pwm/driver/pruicss_pwm.c index 6bda74b..dcaaa21 100644 --- a/source/pruicss_pwm/driver/pruicss_pwm.c +++ b/source/pruicss_pwm/driver/pruicss_pwm.c @@ -1395,3 +1395,58 @@ int32_t PRUICSS_PWM_enableIEP1Slave(PRUICSS_Handle handle, uint8_t enable) } +int32_t PRUICSS_PWM_enableIEPResetOnEPWM0SyncOut(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t enable) +{ + + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < PRUICSS_NUM_IEP_INSTANCES) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_PWM_REG), + CSL_ICSS_G_PR1_IEP0_SLV_PWM_REG_PWM0_RST_CNT_EN, enable); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_PWM_REG), + CSL_ICSS_G_PR1_IEP1_SLV_PWM_REG_PWM0_RST_CNT_EN, enable); + break; + } + } + + return retVal; + +} + +int32_t PRUICSS_PWM_enableIEPResetOnEPWM3SyncOut(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t enable) +{ + + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < PRUICSS_NUM_IEP_INSTANCES) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_PWM_REG), + CSL_ICSS_G_PR1_IEP0_SLV_PWM_REG_PWM3_RST_CNT_EN, enable); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_PWM_REG), + CSL_ICSS_G_PR1_IEP1_SLV_PWM_REG_PWM3_RST_CNT_EN, enable); + break; + } + } + + return retVal; + +} \ No newline at end of file diff --git a/source/pruicss_pwm/include/pruicss_pwm.h b/source/pruicss_pwm/include/pruicss_pwm.h index be0cf61..8ffa392 100644 --- a/source/pruicss_pwm/include/pruicss_pwm.h +++ b/source/pruicss_pwm/include/pruicss_pwm.h @@ -531,6 +531,28 @@ int32_t PRUICSS_PWM_configurePwmEfficiencyModeEnable(PRUICSS_Handle handle, uint */ int32_t PRUICSS_PWM_enableIEP1Slave(PRUICSS_Handle handle, uint8_t enable); +/** + * \brief This API sets enables/disables of IEP counter reset on EPWM0 SYNC OUT event in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param enable 0 for disable, 1 for enable + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * + */ +int32_t PRUICSS_PWM_enableIEPResetOnEPWM0SyncOut(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t enable); + +/** + * \brief This API sets enables/disables of IEP counter reset on EPWM3 SYNCOUT in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param enable 0 for disable, 1 for enable + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * + */ +int32_t PRUICSS_PWM_enableIEPResetOnEPWM3SyncOut(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t enable); + /** @} */ #ifdef __cplusplus