am243x/am263x: docs: Update release notes and pages for 9.1 release

Fixes: PINDSW-7466

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>

docs_src/docs/api_guide/components/current_sense/current_sense.md

@@ -10,8 +10,8 @@ ICSS %SDFM is a sigma delta interface for phase current measurement in high perf
 
 ## Features Supported
  - 3 %SDFM channels on single PRU core
- - Normal current (NC) for data read:  SINC3 filter with OSR 16 to 256
+ - Normal Current (NC) for data read:  SINC3 filter with Over-samping Ratio (OSR) 16 to 256
- - Overcurrent (OC) for comparator: free running SINC3 filter with OSR 16 to 256
+ - Over-current (OC) for comparator: free running SINC3 filter with OSR 16 to 256
  - Event generation(ARM interrupt for data read from DMEM, GPIO toggle for high and low thresholds)
  - Single level High and Low threshold comparator
  - Trigger based normal current sampling

docs_src/docs/api_guide/components/current_sense/sdfm_design.md

@@ -28,12 +28,12 @@ SDK example uses the %SDFM hardware capability in Slice 1 of PRU-ICSSG0.
 	<th>Details
 </tr>
 <tr>
-    <td>Normal current OSR
+    <td>Normal Current Over-samping Ratio (OSR)
     <td>64
 	<td>Tested with 16, 32, 64, 128 and 256
 </tr>
 <tr>
-    <td>Over current OSR
+    <td>Over Current OSR
     <td>16
 	<td>Tested with 16, 32, 64, 128 and 256
 </tr>
@@ -77,12 +77,12 @@ Following section describes the firmware implementation of Sigma Delta Decimatio
 
 ##### Normal Curent (NC)
 
-This section describes normal current implementation. 
+This section describes normal current implementation.
 
 There are two different variations of normal current.
 - Trigger based: It starts execution when the trigger point is acquired (first time CMP event hits) and performs four continuous samplings to bring the accumulator and differntiator registers to stable state for the configured normal current OSR. Initially the CMP register is configured with the first sample trigger start time and then until the next third continuous normal current sample it is updated with the normal current OSR sampling time. At the end of the fourth normal current sample again, it is updated with the second sample start time if double update is enabled otherwise with the first sample trigger start time.
 
-- Continuous sampling: It starts execution when the first time CMP event hits. Every time it updates CMP event register with the normal current OSR sampling time for next continuous sample, store sample values in DMEM and trigger R5 intrrupt. 
+- Continuous sampling: It starts execution when the first time CMP event hits. Every time it updates CMP event register with the normal current OSR sampling time for next continuous sample, store sample values in DMEM and trigger R5 interrupt.
 
 \image html SDFM_NC_FLOW_CHART.png "Normal Current"
 
@@ -97,13 +97,13 @@ Normal current sampling is done twice in one EPWM cycle.
 
 \image html SDFM_Double_update.PNG "Double Update"
 
-##### Over Current (OC)/Threshold Comparator 
+##### Over Current (OC)/Threshold Comparator
 This section describes the over current implementation. It performs continuous sampling (free run) and when the sample value crosses the high or low threshold, the corresponding PWM trip status gets set and TZ_OUT pin goes high. It also stores high and low threshold status in DMEM for all channels, \ref SDFM_getHighThresholdStatus API returns high threshold status for specified SDFM channel number and \ref SDFM_getLowThresholdStatus API returns low threshold status for specified SDFM channel number.
 
 \image html SDFM_OC_Flow_Chart.png "Over current"
 \image html SDFM_OC_ERROR_MAPPING_WITH_PWM_TZ.png "Mapping between Over current errors and PWM TZ blocks"
 
-###### Zero Cross Comparator 
+###### Zero Cross Comparator
 This section describes the zero cross implementation. It compares the current sample and the previous sample values with zero cross threshold value.
 
 There are two cases:
@@ -117,7 +117,7 @@ There are two cases:
 #### Sync with EPWM and trigger timing
 This section describes the EPWM to %SDFM synchronization and trigger timing for each EPWM cycle. At the end of the every EPWM cycle, the EPWM generates a sync out event that resets the IEP timer.
 The firmware initiates normal current sampling at the sample trigger point in each EPWM cycle. It takes four consecutive samples to bring the accumulator and differentiator registers to stable state. It takes the first sample at the trigger point and the next three samples, each after ONE_SAMPLE_TIME.
-Here ONE_SAMPLE_TIME is: OSR*(1/SD_CLK)  
+Here ONE_SAMPLE_TIME is: OSR*(1/SD_CLK)
 \image html SDFM_epwm_sync_and_trigger_timing.png "Sync with EPWM and trigger timing"
 
 #### Fast Detect and Trip generation
@@ -128,12 +128,12 @@ Note: To identify the sigma delta fast detect error trip cause, \ref SDFM_getFas
 
 \image html SDFM_FD_ERROR_MAPPING_WITH_PWM_TZ.png "Mapping between Fast detect errors and PWM TZ blocks"
 
-#### Data/Clock Phase Compensation 
+#### Data/Clock Phase Compensation
 Following points describe the process for measurement of phase difference between clock and data
 - Set PRU IO mode to GPIO mode (default) for direct capture of input data and clock pins 
 - First wait for rising edge on the SD data pin, then check the nearest upcoming edge to the SD clock pin. If the nearest edge of clock pin is falling, then it measures the time between the rising edge of the data pin and the falling edge of the SD clock. Otherwise it measures time between the rising edge of both data and clock pins.
-- It measures delay 8 times and repeats the measurement until the get like 8 time the same or a max variation of 1 PRU cycle. 
+- It measures delay 8 times and repeats the measurement until the get like 8 time the same or a max variation of 1 PRU cycle.
-- Based on the clock polarity, phase delay is calculated. If clock polarity and upcoming nearest edge of clock pin for rising edge of data pin are same, then final phase delay will be half SD clock duty cycle time minus calculated time. Otherwise phase delay will be SD clock one cycle period time minus calculated time  
+- Based on the clock polarity, phase delay is calculated. If clock polarity and upcoming nearest edge of clock pin for rising edge of data pin are same, then final phase delay will be half SD clock duty cycle time minus calculated time. Otherwise phase delay will be SD clock one cycle period time minus calculated time
 \image html SDFM_Phase_delay_flowchart.png "Phase Compensation"
 #### AM64x/AM243x EVM Pin-Multiplexing
 <table>
@@ -175,7 +175,7 @@ Following points describe the process for measurement of phase difference betwee
 <tr>
     <td>PRG0_ECAP0_IN_APWM_OUT
     <td>PIN_PRG0_PRU1_GPO15
-	<td>ECAP output frequency 
+	<td>ECAP output frequency
 </tr>
 <tr>
     <td>GPIO_MTR_1_PWM_EN
@@ -200,7 +200,7 @@ Following points describe the process for measurement of phase difference betwee
 <tr>
     <td>GPIO_ZC_TH_CH0
     <td>PRG1_PRU0_GPO18
-	<td>(J7.64)Ch0 Zero cross output 
+	<td>(J7.64)Ch0 Zero cross output
 </tr>
 <tr>
     <td>GPIO_ZC_TH_CH1
@@ -230,7 +230,7 @@ Following points describe the process for measurement of phase difference betwee
 <tr>
     <td>PRG0_ECAP0_IN_APWM_OUT
     <td>PIN_PRG0_PRU1_GPO15
-	<td>(J6.59)ECAP output frequency 
+	<td>(J6.59)ECAP output frequency
 </tr>
 <tr>
     <td>SD8_CLK

docs_src/docs/api_guide/components/position_sense/biss_c.md

@@ -17,7 +17,7 @@ BiSS is an open-source digital interface for sensors and actuators. BiSS stands
    -  Support for multiple encoders connected via daisy-chain configuration (up-to 3 encoders)
    -  Support for concurrent multi-channel support on a single PRU (up-to 3 identical encoders)
    -  Support for multi-channel encoders of different make under load share model (each of PRU, RTU-PRU, and TX-PRU from one PRU-ICSSG slice handles one channel)
-   -  Support for up to 100 mtr cable
+   -  Support for up to 100 meter cable
 
 ## Features Not Supported
 

docs_src/docs/api_guide/components/position_sense/biss_c_design.md

@@ -19,7 +19,6 @@ Clock, data transmit, data receive and receive enable signals from PRU1 of ICSS_
 ## Implementation
 
 The BISS-C receiver function is implemented on TI Sitara™ Devices.
-Encoder is connected to IDK via universal Digital Interface TIDA-00179(https://www.ti.com/tool/TIDA-00179), TIDEP-01015(3-axis board) and 3 Axis Interface card.
 Design is split into three parts – 3 channel peripheral interface support in PRU, firmware running in PRU and driver running in ARM.
 Application is supposed to use the BISS-C driver APIs to leverage 3 channel peripheral interface functionality.
 SDK examples used the BISS-C hardware capability in Slice 1 (either 1 core or 3 cores based on the confiuration) of PRU-ICSSG0.

docs_src/docs/api_guide/components/position_sense/endat_design.md

@@ -21,13 +21,12 @@ Clock, data transmit, data receive and receive enable signals from PRU1 of ICSS_
 ## Implementation
 
 The EnDat receiver function is implemented on TI Sitara™ Devices.
-Encoder is connected to IDK via universal Digital Interface TIDA-00179(https://www.ti.com/tool/TIDA-00179), TIDEP-01015(3-axis board) and 3 Axis Interface card.
+Encoder is connected to IDK via <a href="http://www.ti.com/tool/TIDA-00179" target="_blank"> TIDA-00179 Universal Digital Interface to Absolute Position Encoders </a>, <a href="../TIDEP-01015Rev E1.1(001)_Sch.pdf" target="_blank"> TIDEP-01015 3 Axis Board </a> and <a href="../MS_TI_AM64x_EVM_3-AXIS_INTERFACE_BOARD_SCH_REV_E1.pdf" target="_blank"> Interface card connecting EVM and TIDEP-01015 3 Axis </a>.
 Design is split into three parts – EnDat hardware support in PRU, firmware running in PRU and driver running in ARM.
 Application is supposed to use the EnDat driver APIs to leverage EnDat functionality.
 SDK examples used the EnDat hardware capability in Slice 1 (either 1 core or 3 cores based ont the confiuration) of PRU-ICSSG0.
 Remaining PRUs in the AM64x/AM243x EVM are available for Industrial Ethernet communication and/or motor control interfaces.
 
-
 ###  Specifications
 
 <table>

docs_src/docs/api_guide/components/position_sense/tamagawa.md

@@ -7,7 +7,7 @@
 The Tamagawa receiver firmware running on PRU-ICSS provides a defined well interface to execute the Tamagawa protocol. The Tamagawa diagnostic application interacts with the Tamagawa receiver firmware interface.
 
 \note
-Tamagawa firmware and examples are based on EnDAT hardware interface from PRU-ICSSG.
+Tamagawa firmware and examples are based on 3 Channel Peripheral interface from PRU-ICSSG.
 
 ## Features Supported
 

docs_src/docs/api_guide/components/pruicss_pwm/pruicss_pwm.md

@@ -32,7 +32,7 @@ SysConfig can be used to configure things mentioned below:
 
 ## Important Note
 
-PRUICSS has one pwm module, which has four pwm sets (PWM0, PWM1, PWM2, PWM3)
+PRU-ICSS has one PWM module, which has four PWM sets (PWM0, PWM1, PWM2, PWM3)
 Each Set has six signals (A0,A1,A2,B0,B1,B2) With Reference to Technical Reference Manual, Pwm six signals(A0,A1,A2,B0,B1,B2) Naming convention is is slightly different as mentioned in \ref PRUICSS_PWM_API
 
 ## Example Usage

docs_src/docs/api_guide/components/rtlibs/dcl/dcl.cfg

@@ -1,4 +1,4 @@
-INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.md
+INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/rtlibs/dcl/dcl.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/dcl.h
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/dcl_common.h
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pi/dcl_pi.h

docs_src/docs/api_guide/components/rtlibs/rtlibs.md

@@ -0,0 +1,8 @@
+# Real Time Libraries {#REALTIMELIBS}
+
+[TOC]
+
+Real Time Libraries module contains following two components:
+
+- \subpage DCL
+- \subpage TRANSFORMS

docs_src/docs/api_guide/components/rtlibs/transforms/transforms.cfg

@@ -1,4 +1,4 @@
-INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/transforms/transforms.md
+INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/rtlibs/transforms/transforms.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/transforms/clarke/clarke.h
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/transforms/park/park.h
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/transforms/ipark/ipark.h

docs_src/docs/api_guide/components/rtlibs/transforms/transforms.md

@@ -1,4 +1,4 @@
-# Transformation Algorithm {#Transforms}
+# Transformation Algorithm {#TRANSFORMS}
 
 [TOC]
 

docs_src/docs/api_guide/device/am243x/components.cfg

@@ -13,6 +13,8 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_se
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/current_sense/current_sense.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/current_sense/sdfm_design.md
 
+INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/rtlibs/rtlibs.md
+
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/pruicss_pwm/pruicss_pwm.md
 
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/endat/include/endat_api.h

docs_src/docs/api_guide/device/am243x/includes.cfg

@@ -14,8 +14,8 @@ INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/rele
 INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/release_notes_09_01_00.md
 @INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg
 @INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg
-@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.cfg
+@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/rtlibs/dcl/dcl.cfg
-@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/transforms/transforms.cfg
+@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/rtlibs/transforms/transforms.cfg
 
 # Used to selectively pick DEVICE specific sections within .md files
 ENABLED_SECTIONS = SOC_AM243X

docs_src/docs/api_guide/device/am243x/release_notes.md

@@ -4,6 +4,6 @@
 
 Refer the below pages for release specific information
 
-- \subpage RELEASE_NOTES_09_00_00_PAGE
 - \subpage RELEASE_NOTES_09_01_00_PAGE
+- \subpage RELEASE_NOTES_09_00_00_PAGE
 

docs_src/docs/api_guide/device/am243x/release_notes_09_00_00.md

@@ -28,7 +28,7 @@ Digital Control Library
 
 SOC    | Supported CPUs  | Boards                                                                                                      | Host PC
 -------|-----------------|-------------------------------------------------------------------------------------------------------------|-----------------------------------
-AM243x | R5F             | AM243x GP EVM (referred to as am243x-evm in code), \n AM243x LAUNCHPAD (referred to as am243x-lp in code)   | Windows 10 64b or Ubuntu 18.04 64b
+AM243x | R5F             | AM243x EVM (referred to as am243x-evm in code), \n AM243x LAUNCHPAD (referred to as am243x-lp in code)      | Windows 10 64b or Ubuntu 18.04 64b
 
 ## Tools, Compiler and Other Open Source SW Module Information
 
@@ -203,7 +203,7 @@ Module       | Supported CPUs | SysConfig Support | OS Support        | Key feat
     <td> %SDFM: Incorrect samples seen intermittently with EPWM as %SDFM clock
     <td> Current Sense %SDFM
     <td> 9.0 onwards
-    <td> Use 5MHz %SDFM clock from EPWM1 (tested with 5MHz clock from EPWM) or use PRU-ICSSG ECAP as %SDFM clock source 
+    <td> Use 5MHz %SDFM clock from EPWM1 (tested with 5MHz clock from EPWM) or use PRU-ICSSG ECAP as %SDFM clock source
 </tr>
 <tr>
     <td> PINDSW-6628
@@ -228,7 +228,7 @@ Module       | Supported CPUs | SysConfig Support | OS Support        | Key feat
 </tr>
 <tr>
     <td> PINDSW-6931
-    <td> Tamagawa: Firmware build failing 
+    <td> Tamagawa: Firmware build failing
     <td> Position Sense Tamagawa
     <td> 9.0 onwards
     <td>1. Update include path of icss_regs.inc and icss_cfg_regs.inc files to `../../../../mcu_plus_sdk/source/pru_io/firmware/common/ ` path in `tamagawa_main.asm` and `tamagawa_icss_reg_defs.h` files.<br>2. Replace ED with ENDAT in symbol definitions in tamagawa_main.asm file's lines 101 to 122. (For example, update `ICSS_CFG_PRU0_ED_CH0_CFG1` to `ICSS_CFG_PRU0_ENDAT_CH0_CFG1` )</td>
@@ -338,10 +338,10 @@ earlier SDKs.
     <th> Additional Remarks
 </tr>
 <tr>
-    <td> 
+    <td>
-    <td> 
+    <td>
-    <td> 
+    <td>
-    <td> 
+    <td>
 </tr>
 </table> -->
 
@@ -358,7 +358,7 @@ earlier SDKs.
     <td>  Current Sense %SDFM
     <td>  Structure `SdfmPrms_s`
     <td>  Added variables `iep_clock`, `sd_clock`, `en_second_update`, `firstSampTrigTime` and `secondSampTrigTime`
-    <td> 
+    <td>
 </tr>
 </table>
 
@@ -393,7 +393,7 @@ earlier SDKs.
     <td> Current Sense %SDFM
     <td> `SDFM_setSampleReadingTime`
     <td> Changed name of API \ref SDFM_setSampleTriggerTime and updated a parameter name `samp_trig_time`
-    <td> - 
+    <td> -
 </tr>
 <tr>
     <td> Current Sense %SDFM
@@ -404,25 +404,25 @@ earlier SDKs.
 <tr>
     <td> Current Sense %SDFM
     <td> \ref SDFM_setCompFilterOverSamplingRatio
-    <td> Changed type of OSR parameter
+    <td> Changed type of over-sampling Rate (OSR) parameter
-    <td> uint8_t to uint16_t 
+    <td> uint8_t to uint16_t
 </tr>
 <tr>
     <td> Current Sense %SDFM
-    <td> `SDFM_setAccOverSamplingRatio` 
+    <td> `SDFM_setAccOverSamplingRatio`
     <td> Removed this API
     <td> -
 </tr>
 <tr>
     <td> Current Sense %SDFM
-    <td> Structure \ref SDFM_Ctrl 
+    <td> Structure \ref SDFM_Ctrl
-    <td> Removed variables: `ctrl` and `stat`, and added variables `sdfm_en`, `sdfm_en_ack` and `sdfm_pru_id`  
+    <td> Removed variables: `ctrl` and `stat`, and added variables `sdfm_en`, `sdfm_en_ack` and `sdfm_pru_id`
-    <td> - 
+    <td> -
 </tr>
 <tr>
     <td> Current Sense %SDFM
     <td> Structure \ref SDFM_CfgTrigger
-    <td> Removed variables `trig_samp_time`, `oc_prd_iep_cnt` and `sample_count`, and added variables `en_double_nc_sampling`, `first_samp_trig_time` and `second_samp_trig_time` 
+    <td> Removed variables `trig_samp_time`, `oc_prd_iep_cnt` and `sample_count`, and added variables `en_double_nc_sampling`, `first_samp_trig_time` and `second_samp_trig_time`
     <td> -
 </tr>
 </table>

docs_src/docs/api_guide/device/am243x/release_notes_09_01_00.md

@@ -17,16 +17,36 @@
 
 Feature                                                                                         | Module
 ------------------------------------------------------------------------------------------------|-----------------------------------
+EtherCAT-Connected, Single-Chip, Dual-Servo Motor Drive Reference Design (TIDEP-01032)          | Reference Design
+Three channel BiSS-C with one PRU-ICSSG Slice                                                   | Position Sense BiSS-C
+Point-to-point and daisy chaining connection support for BiSS-C                                 | Position Sense BiSS-C
+Multi channel BiSS-C with daisy chaining                                                        | Position Sense BiSS-C
+Multiple interface speed support                                                                | Position Sense BiSS-C
+Long cable (upto 100 meters)                                                                    | Position Sense BiSS-C
+Nine Channel ICSS %SDFM Examples                                                                | Current Sense %SDFM
+ICSS %SDFM Example with Continuous Normal Current Sampling                                      | Current Sense %SDFM
+ICSS %SDFM Example with Phase Compensation                                                      | Current Sense %SDFM
+Fast Detect                                                                                     | Current Sense %SDFM
+Trip Generation using PRU-ICSS TripZone                                                         | Current Sense %SDFM
+Zero Crossing Detection                                                                         | Current Sense %SDFM
 Three channel support with one PRU-ICSSG Slice                                                  | Position Sense HDSL
 SYNC Mode support for 1 to 10 frames per cycle and 8 kHz to 50 kHz cycle frequency              | Position Sense HDSL
 API support for Parameter Channel Long Message Read and Write                                   | Position Sense HDSL
 Add support for PIPE_D register for SensorHub Channel                                           | Position Sense HDSL
+Add support for PIPE_D register for SensorHub Channel                                           | Position Sense HDSL
+Long cable (upto 100 meters)                                                                    | Position Sense HDSL
+Two channel example with LP-AM243 + BP-AM2BLDCSERVO                                             | Position Sense HDSL
+Compare event based command trigger support                                                     | Position Sense Tamagawa
+Two channel example with LP-AM243 + BP-AM2BLDCSERVO                                             | Position Sense Tamagawa
+Two channel example with LP-AM243 + BP-AM2BLDCSERVO                                             | Position Sense EnDAT
+Three channel PRU-ICSS PWM Example                                                              | PRU-ICSS PWM
+Transforms Library and Example                                                                  | Real Time Libraries
 
 ## Device and Validation Information
 
 SOC    | Supported CPUs  | Boards                                                                                                      | Host PC
 -------|-----------------|-------------------------------------------------------------------------------------------------------------|-----------------------------------
-AM243x | R5F             | AM243x GP EVM (referred to as am243x-evm in code), \n AM243x LAUNCHPAD (referred to as am243x-lp in code)   | Windows 10 64b or Ubuntu 18.04 64b
+AM243x | R5F             | AM243x EVM (referred to as am243x-evm in code), \n AM243x LAUNCHPAD (referred to as am243x-lp in code)      | Windows 10 64b or Ubuntu 18.04 64b
 
 ## Tools, Compiler and Other Open Source SW Module Information
 
@@ -62,19 +82,69 @@ Below features are not support on AM243X LAUNCHPAD due to SOC or board constrain
 
 ### Position Sense
 
-Module       | Supported CPUs | SysConfig Support | OS Support        | Key features tested                                                                                                                                            | Key features not tested
+<table>
--------------|----------------|-------------------|-------------------|----------------------------------------------------------------------------------------------------------------------------------------------------------------|-----------------------------------------------------------------------------------
+<tr>
-EnDat        | R5F            | YES               | FreeRTOS, NORTOS  | Single channel, Multi channel, Continuous mode for single channel, Load share mode, Recovery Time for 2.2 command set, Boosterpack with AM243x-LP              | Encoder receive communication command
+    <th> Module
-HDSL         | R5F            | YES               | FreeRTOS, NORTOS  | Freerun mode(300MHz,225MHz), Sync mode(225MHz), Short Message Read & Write, Long Message Read & Write, Boosterpack with AM243x-LP                              | Long cables
+    <th> Supported CPUs
-Tamagawa     | R5F            | YES               | FreeRTOS, NORTOS  | Absolute position, Encoder ID, Reset, EEPROM Read, EEPROM Write, 2.5 Mbps and 5 Mbps Encoder Support, Boosterpack with AM243x-LP                               | -
+    <th> SysConfig Support
+    <th> OS Support
+    <th> Key features tested 
+    <th> Key features not tested 
+</tr>
+<tr>
+    <td> EnDat
+    <td> R5F
+    <td> YES
+    <td> FreeRTOS, NORTOS
+    <td> Single channel, Multi channel using single PRU core and three PRU cores (load share mode), Continuous mode, Recovery Time for 2.2 command set, Long cable (upto 100 meters), Boosterpack with AM243x-LP
+    <td> Encoder receive communication command
+</tr>
+<tr>
+    <td> HDSL
+    <td> R5F
+    <td> YES
+    <td> FreeRTOS, NORTOS
+    <td> Single channel, Multi channel using three PRU cores (load share mode), Free Run mode, Sync mode, Short Message Read and Write, Long Message Read and Write, Pipeline Channel Data, Long cable (upto 100 meters), Boosterpack with AM243x-LP
+    <td> 225 MHz PRU-ICSSG Core Clock based firmware
+</tr>
+<tr>
+    <td> Tamagawa
+    <td> R5F
+    <td> YES
+    <td> FreeRTOS, NORTOS
+    <td> Absolute position, Encoder ID, Reset, EEPROM Read, EEPROM Write, 2.5 Mbps and 5 Mbps Encoder Support, Boosterpack with AM243x-LP
+    <td> -
+</tr>
+<tr>
+    <td> BiSS-C 
+    <td> R5F
+    <td> YES
+    <td> FreeRTOS, NORTOS
+    <td> Single channel, Multi channel using single PRU core and three PRU cores (load share mode), point-to-point connection, daisy chaining, control communication, automatic processing delay detection and compensation, interface speed of 1, 2, 5, 8, and 10 MHz, Long cable (upto 100 meters)
+    <td> 
+</tr>
+</table>
 
 ### Current Sense
 
-
+<table>
-Module       | Supported CPUs | SysConfig Support | OS Support        | Key features tested                                                                                                                                            | Key features not tested
+<tr>
--------------|----------------|-------------------|-------------------|----------------------------------------------------------------------------------------------------------------------------------------------------------------|-----------------------------------------------------------------------------------
+    <th> Module
-%SDFM        | R5F            | YES               | FreeRTOS, NORTOS  | 3 %SDFM channels on single PRU core, %SDFM Sync with EPWM, Overcurrent, single normal current sampling per PWM cycle, Double normal current sampling per PWM cycle, High and Low threshold comparator, Tested with SDFM clock from ECAP, Tested with 5MHz Clock from EPWM                                                                                      | -
+    <th> Supported CPUs
-
+    <th> SysConfig Support
+    <th> OS Support
+    <th> Key features tested 
+    <th> Key features not tested 
+</tr>
+<tr>
+    <td> ICSS %SDFM
+    <td> R5F
+    <td> YES
+    <td> FreeRTOS, NORTOS
+    <td> Three %SDFM channels on single PRU core, Nine %SDFM channels on three PRU cores (load share mode), %SDFM Sync with EPWM, Single/Double Normal Current Sampling per PWM cycle, Continuous Normal Current Sampling, High and Low Threshold Comparator (Over-current detction), Fast Detect, Phase Compensation, Zero Cross Detection, Trip Generation using PRU-ICSS TripZone, Tested with %SDFM clock from ECAP, Tested with 5MHz Clock from EPWM
+    <td> -
+</tr>
+</table>
 
 ## Fixed Issues
 

docs_src/docs/api_guide/device/am263x/components.cfg

@@ -1,4 +1,6 @@
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/position_sense.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/tamagawa_uart.md
 
+INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/rtlibs/rtlibs.md
+
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/tamagawa_over_soc_uart/include/tamagawa_soc_uart_interface.h

docs_src/docs/api_guide/device/am263x/includes.cfg

@@ -14,8 +14,8 @@ INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/rele
 INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/release_notes_09_01_00.md
 @INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg
 @INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg
-@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.cfg
+@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/rtlibs/dcl/dcl.cfg
-@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/transforms/transforms.cfg
+@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/rtlibs/transforms/transforms.cfg
 
 # Used to selectively pick DEVICE specific sections within .md files
 ENABLED_SECTIONS = SOC_AM263X

docs_src/docs/api_guide/device/am263x/release_notes.md

@@ -4,6 +4,6 @@
 
 Refer the below pages for release specific information
 
-- \subpage RELEASE_NOTES_09_00_00_PAGE
 - \subpage RELEASE_NOTES_09_01_00_PAGE
+- \subpage RELEASE_NOTES_09_00_00_PAGE
 

docs_src/docs/api_guide/device/am263x/release_notes_09_01_00.md

@@ -15,6 +15,7 @@
 
 Feature                                                                                         | Module
 ------------------------------------------------------------------------------------------------|-----------------------------------
+Re-baseline to MCU+ SDK 09.01.00 and Industrial Communications SDK 09.01.00                     | Motor Control SDK
 
 ## Device and Validation Information
 

docs_src/docs/api_guide/doxy_warnings_am243x.txt

@@ -0,0 +1 @@
+C:/ti/motor_control_sdk/docs_src/docs/api_guide/examples/bissc_example.md:71: warning: Found \endcond command without matching \cond

docs_src/docs/api_guide/doxygen.cfg

@@ -219,20 +219,17 @@ ALIASES+=inlineVideo{3}="\htmlonly <video autoplay playinline muted controls \3
 ALIASES+=VAR_MY_NAME="my_value"
 ALIASES+=VAR_TI_HOME_PAGE="\htmllink{https://www.ti.com,TI}"
 ALIASES+=VAR_SDK_NAME="Motor Control SDK"
-ALIASES+=VAR_CCS_VERSION="12.4.0"
+ALIASES+=VAR_CCS_VERSION="12.5.0"
-ALIASES+=VAR_CCS_FOLDER_VERSION="1240"
+ALIASES+=VAR_CCS_FOLDER_VERSION="1250"
-ALIASES+=VAR_CCS_VERSION_AM263X="12.4.0"
+ALIASES+=VAR_CCS_VERSION_AM263X="12.5.0"
-ALIASES+=VAR_CCS_FOLDER_VERSION_AM263X="1240"
+ALIASES+=VAR_CCS_FOLDER_VERSION_AM263X="1250"
-ALIASES+=VAR_SYSCFG_VERSION="1.17.0"
+ALIASES+=VAR_SYSCFG_VERSION="1.18.0"
-ALIASES+=VAR_SYSCFG_BUILD="3128"
+ALIASES+=VAR_SYSCFG_BUILD="3266"
-ALIASES+=VAR_SYSCFG_VERSION_FULL="1.17.0_3128"
+ALIASES+=VAR_SYSCFG_VERSION_FULL="1.18.0_3266"
-ALIASES+=VAR_SYSCFG_VERSION_AM273X="1.17.0"
+ALIASES+=VAR_SYSCFG_VERSION_AM263X="1.18.0"
-ALIASES+=VAR_SYSCFG_BUILD_AM273X="3128"
+ALIASES+=VAR_SYSCFG_BUILD_AM263X="3266"
-ALIASES+=VAR_SYSCFG_VERSION_FULL_AM273X="1.17.0_3128"
+ALIASES+=VAR_SYSCFG_VERSION_FULL_AM263X="1.18.0_3266"
-ALIASES+=VAR_SYSCFG_VERSION_AM263X="1.17.0"
+ALIASES+=VAR_TI_ARM_CLANG_VERSION="3.2.0.LTS"
-ALIASES+=VAR_SYSCFG_BUILD_AM263X="3128"
-ALIASES+=VAR_SYSCFG_VERSION_FULL_AM263X="1.17.0_3128"
-ALIASES+=VAR_TI_ARM_CLANG_VERSION="2.1.3.LTS"
 ALIASES+=VAR_TI_C6000_CGT_VERSION="8.3.12"
 ALIASES+=VAR_GCC_AARCH64_VERSION="9.2-2019.12"
 ALIASES+=VAR_GCC_ARM_VERSION="7-2017-q4-major"
@@ -240,7 +237,7 @@ ALIASES+=VAR_FREERTOS_KERNEL_VERSION="10.4.3"
 ALIASES+=VAR_FREERTOS_SMP_KERNEL_VERSION="202110.00-SMP"
 ALIASES+=VAR_DSPLIB_VERSION="3.4.0.0"
 ALIASES+=VAR_TINYUSB_VERSION="0.14.0"
-ALIASES+=VAR_LWIP_VERSION="STABLE-2_1_2_RELEASE"
+ALIASES+=VAR_LWIP_VERSION="STABLE-2_2_0_RELEASE"
 ALIASES+=VAR_SECURITY_MBEDTLS_VERSION="mbedtls-3.0.0"
 ALIASES+=VAR_MBEDTLS_VERSION="mbedtls-2.13.1"
 ALIASES+=VAR_SYSCFG_USAGE_NOTE="\note It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle."

docs_src/docs/api_guide/examples/bissc_example.md

@@ -13,23 +13,12 @@ A serial terminal application (like teraterm/ hyperterminal/ minicom) is then ru
 To configure, select the serial port corresponding to the port emulated over USB by the EVM.
 The host serial port should be configured to 115200 baud, no parity, 1 stop bit and no flow control.
 
-Connect the BISS-C encoder(s) via TIDA-00179 cards on a 3 axis board (TIDEP-01015) to the EVM.
-On AM243x LP, a BISS-C encoder can be directly connected using a TIDA-00179 card.
-
-The connections between AM243x LP and TIDA-00179 for Channel 0 are:
-
-BISSC_CHANNEL0_TX -> PRG0_PRU1_GPO1,
-BISSC_CHANNEL0_TX_ENABLE -> PRG0_PRU1_GPO2,
-BISSC_CHANNEL0_RX -> PRG0_PRU1_GPO13,
-BISSC_CHANNEL0_CLK -> PRG0_PRU1_GPO0.
-
 The BISS-C receiver firmware running on ICSS0-PRU1 provides a defined interface. The BISS-C diagnostic application interacts with the BISS-C receiver firmware interface. It then presents the user with menu options to select Data ID code. The application collects the data entered by the user and configures the relevant interface. Then via the BISS-C receiver interface, the command is triggered. Once the command completion is indicated by the interface, the status of the transaction is checked. If the Status indicates success, the result is presented to the user.
 
 ## Channel Selection In Sysconfig
 
 \image html bissc_syscfg_ch_sel.png      "Channel Selection In Sysconfig"
 
-
 \image html Endat_channel_selection_configuration.png     "BiSS-C configuration seletion between Single/Multi channel "
 
 
@@ -58,28 +47,16 @@ The BISS-C receiver firmware running on ICSS0-PRU1 provides a defined interface.
 
 # Supported Combinations {#EXAMPLES_MOTORCONTROL_BISSC_COMBOS}
 
-\cond SOC_AM64X
-
- Parameter      | Value
- ---------------|-----------
- CPU + OS       | r5fss0-0 freertos
- ICSSG          | ICSSG0
- PRU            | PRU1
- Toolchain      | ti-arm-clang
- Board          | @VAR_BOARD_NAME_LOWER
- Example folder | examples/motor_control/bissc_diagnostic
-
-\endcond
-
 \cond SOC_AM243X
 
  Parameter      | Value
  ---------------|-----------
  CPU + OS       | r5fss0-0 freertos
  ICSSG          | ICSSG0
- PRU            | PRU1
+ PRU            | PRU1 (single channel, multi channel using single PRU)
+ ^              | PRU1, RTU-PRU1, TXPRU1 (multi channel using three PRUs - load share mode)
  Toolchain      | ti-arm-clang
- Board          | @VAR_LP_BOARD_NAME_LOWER (E3 Revision)
+ Board          | @VAR_LP_BOARD_NAME_LOWER (2 channel and 1 channel examples)
  Example folder | examples/motor_control/bissc_diagnostic
 
 \endcond
@@ -87,21 +64,12 @@ The BISS-C receiver firmware running on ICSS0-PRU1 provides a defined interface.
 # Steps to Run the Example
 
 ## Hardware Prerequisites
-Other than the basic EVM setup mentioned in \htmllink{@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html, EVM Setup}, additional hardware required to run this demo is mentioned below
--  BISS-C Encoders
--  TIDA-00179 Universal Digital Interface to Absolute Position Encoders, http://www.ti.com/tool/TIDA-00179
--  TIDEP-01015 3 Axis board
--  Interface card connecting EVM and TIDEP-01015 3 Axis board
 
-\cond SOC_AM243X
+- BISS-C Encoders
-### Hardware Prerequisities for Booster Pack
+- <a href="https://www.ti.com/tool/LP-AM243" target="_blank"> AM243x-LP Board </a>
-
+- <a href="https://www.ti.com/tool/BP-AM2BLDCSERVO" target="_blank"> BP-AM2BLDCSERVO </a>
-- BISS-C encoder
-- AM243x-LP board
-- BP-AM2BLDCSERVO
 \endcond
 
-
 ## Hardware Setup
 
 \cond SOC_AM243X
@@ -180,16 +148,14 @@ Other than the basic EVM setup mentioned in \htmllink{@VAR_MCU_SDK_DOCS_PATH/EVM
 
 \endcond
 
-
 ## Build, load and run
 
-- **When using CCS projects to build**, import the CCS project and build it using the CCS project menu (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_PROJECTS_PAGE.html, Using SDK with CCS Projects}).
+- **When using CCS projects to build**, import the CCS project and build it using the CCS project menu (see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_PROJECTS_PAGE.html" target="_blank"> Using SDK with CCS Projects </a>).
 - **When using makefiles to build**, note the required combination and build using
-  make command (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html, Using SDK with Makefiles})
+  make command (see <a href="@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html" target="_blank"> Using SDK with Makefiles </a>)
-- Launch a CCS debug session and run the executable, see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html, CCS Launch\, Load and Run}
+- Launch a CCS debug session and run the executable, see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html" target="_blank">  CCS Launch, Load and Run </a>
 - Refer to UART terminal for user interface menu options.
 
-
 ### Sample Output
 
 Shown below is a sample output when the application is run:

docs_src/docs/api_guide/examples/endat_example.md

@@ -86,7 +86,8 @@ Following section describes the Example implementation of EnDat on ARM(R5F).
  ---------------|-----------
  CPU + OS       | r5fss0-0 freertos
  ICSSG          | ICSSG0
- PRU            | PRU1, TXPRU1 and RTUPRU1
+ PRU            | PRU1 (single channel, multi channel using single PRU)
+ ^              | PRU1, RTU-PRU1, TXPRU1 (multi channel using three PRUs - load share mode)
  Toolchain      | ti-arm-clang
  Board          | @VAR_BOARD_NAME_LOWER
  Example folder | examples/position_sense/endat_diagnostic
@@ -99,9 +100,10 @@ Following section describes the Example implementation of EnDat on ARM(R5F).
  ---------------|-----------
  CPU + OS       | r5fss0-0 freertos
  ICSSG          | ICSSG0
- PRU            | PRU1, TXPRU1 and RTUPRU1
+ PRU            | PRU1 (single channel, multi channel using single PRU)
+ ^              | PRU1, RTU-PRU1, TXPRU1 (multi channel using three PRUs - load share mode)
  Toolchain      | ti-arm-clang
- Board          | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
+ Board          | @VAR_BOARD_NAME_LOWER (3 channel and 1 channel examples), @VAR_LP_BOARD_NAME_LOWER (2 channel and 1 channel examples)
  Example folder | examples/position_sense/endat_diagnostic
 
 \endcond
@@ -111,16 +113,18 @@ Following section describes the Example implementation of EnDat on ARM(R5F).
 ## Hardware Prerequisites
 
 Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
-- EnDAT encoder
+- EnDAT Encoder(s)
 - <a href="http://www.ti.com/tool/TIDA-00179" target="_blank"> TIDA-00179 Universal Digital Interface to Absolute Position Encoders </a>
-- TIDEP-01015 3 Axis board
+- <a href="../TIDEP-01015Rev E1.1(001)_Sch.pdf" target="_blank"> TIDEP-01015 3 Axis Board </a>
-- Interface card connecting EVM and TIDEP-01015 3 Axis board
+- <a href="../MS_TI_AM64x_EVM_3-AXIS_INTERFACE_BOARD_SCH_REV_E1.pdf" target="_blank"> Interface card connecting EVM and TIDEP-01015 3 Axis </a>
+
+\note For more design details of the TIDEP-01015 3 Axis Board, or Interface card connecting EVM and TIDEP-01015 3 Axis, please contact TI via E2E/FAE.
 
 \cond SOC_AM243X
 ### Hardware Prerequisities for Booster Pack
 
-- EnDat encoder
+- EnDAT Encoder(s)
-- AM243x-LP board 
+- <a href="https://www.ti.com/tool/LP-AM243" target="_blank"> AM243x-LP Board </a> 
 - <a href="https://www.ti.com/tool/BP-AM2BLDCSERVO" target="_blank"> BP-AM2BLDCSERVO </a>
 \endcond
 

docs_src/docs/api_guide/examples/examples.md

@@ -8,7 +8,7 @@ This page lists all the examples and demos supported in this SDK.
     -# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA
 - Current Sense
     -# \subpage EXAMPLES_MOTORCONTROL_SDFM
-- PRUICSS PWM
+- PRU-ICSS PWM
     -# \subpage EXAMPLE_PRUICSS_PWM_DUTY_CYCLE
 \endcond
 
@@ -19,15 +19,17 @@ This page lists all the examples and demos supported in this SDK.
     -# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA
     -# \subpage EXAMPLE_MOTORCONTROL_BISSC
 - Current Sense
-    -# \subpage EXAMPLES_MOTORCONTROL_SDFM
+    - \subpage EXAMPLES_MOTORCONTROL_SDFM
         -# \ref BASIC_SDFM_EXAMPLES
         -# \ref BASIC_SDFM_EXAMPLES_WITH_CONTINUOUS_NC
         -# \ref BASIC_SDFM_EXAMPLE_WITH_PHASE_DELAY
-- RTLibs
+- Real Time Libraries
-    -# \subpage EXAMPLES_DCL_PI
+    - DCL
-    -# \subpage EXAMPLES_DCL_DF22
+        -# \subpage EXAMPLES_DCL_PI
-    -# \subpage EXAMPLES_TRANSFORMS_TEST
+        -# \subpage EXAMPLES_DCL_DF22
-- PRUICSS PWM
+    - Transforms
+        -# \subpage EXAMPLES_TRANSFORMS_TEST
+- PRU-ICSS PWM
     -# \subpage EXAMPLE_PRUICSS_PWM_DUTY_CYCLE
     -# \subpage EXAMPLE_PRUICSS_PWM_EPWM_SYNC
 \endcond
@@ -35,8 +37,10 @@ This page lists all the examples and demos supported in this SDK.
 \cond SOC_AM263X
 - Position Sense
     -# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA_OVER_UART
-- RTLibs
+- Real Time Libraries
-    -# \subpage EXAMPLES_DCL_PI
+    - DCL
-    -# \subpage EXAMPLES_DCL_DF22
+        -# \subpage EXAMPLES_DCL_PI
-    -# \subpage EXAMPLES_TRANSFORMS_TEST
+        -# \subpage EXAMPLES_DCL_DF22
+    - Transforms
+        -# \subpage EXAMPLES_TRANSFORMS_TEST
 \endcond

docs_src/docs/api_guide/examples/hdsl_example.md

@@ -58,7 +58,8 @@ This example also allows the capability to save the HDSL register data into memo
  ---------------|-----------
  CPU + OS       | r5fss0-0 freertos
  ICSSG          | ICSSG0
- PRU            | PRU1
+ PRU            | PRU1 (single channel)
+ ^              | PRU1, RTU-PRU1, TXPRU1 (multi channel using three PRUs - load share mode)
  Toolchain      | ti-arm-clang
  Board          | @VAR_BOARD_NAME_LOWER
  Example folder | examples/position_sense/hdsl_diagnostic
@@ -71,7 +72,8 @@ This example also allows the capability to save the HDSL register data into memo
  ---------------|-----------
  CPU + OS       | r5fss0-0 freertos
  ICSSG          | ICSSG0
- PRU            | RTU-PRU1, PRU1, TXPRU1 (based on number of channels enabled)
+ PRU            | PRU1 (single channel)
+ ^              | PRU1, RTU-PRU1, TXPRU1 (multi channel using three PRUs - load share mode)
  Toolchain      | ti-arm-clang
  Board          | @VAR_BOARD_NAME_LOWER (2 channel and 1 channel examples), @VAR_LP_BOARD_NAME_LOWER (2 channel and 1 channel examples)
  Example folder | examples/position_sense/hdsl_diagnostic
@@ -83,25 +85,25 @@ This example also allows the capability to save the HDSL register data into memo
 ## Hardware Prerequisites
 
 Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
-- HDSL encoder
+- HDSL Encoder(s)
 - Below are two options to connect encoder to AM64x/AM243x EVM.
     - **Option 1**
         - <a href="http://www.ti.com/tool/TIDA-00179" target="_blank"> TIDA-00179 Universal Digital Interface to Absolute Position Encoders </a>
-        - TIDEP-01015 3 Axis board
+        - <a href="../TIDEP-01015Rev E1.1(001)_Sch.pdf" target="_blank"> TIDEP-01015 3 Axis Board </a>
-        - Interface card connecting EVM and TIDEP-01015 3 Axis board
+        - <a href="../MS_TI_AM64x_EVM_3-AXIS_INTERFACE_BOARD_SCH_REV_E1.pdf" target="_blank"> Interface card connecting EVM and TIDEP-01015 3 Axis </a>
         - Connect the Hiperface DSL encoder to HDSL+/-(Pin number 6 and 7) signals available on header J7 or Sub-D15 connector of the "Universal Digital Interface to Absolute Position Encoders" board.
     - **Option 2**
-        - HDSL AM64xE1 Transceiver. If application is using this card, define the macro HDSL_AM64xE1_TRANSCEIVER in the CCS project/make file.
+        - <a href="../HDSL_AM64xE1_Schematics.pdf" target="_blank"> HDSL AM64xE1 Transceiver</a> (If application is using this card, define the macro HDSL_AM64xE1_TRANSCEIVER in the CCS project/make file)
         - Connect the Hiperface DSL encoder to J10.
 		- HDSL AM64xE1 Transceiver supports two channels that can be used to support HDSL safety, multi axis servo drives.
-		- Schematics are shared in the MCU+SDK package. For more design details of the transceiver card, please contact TI via E2E/FAE.
+
-		-  <a href="../HDSL_AM64xE1_Schematics.pdf" target="_blank">  HDSL Transceiver Card Schematics </a> document.
+\note For more design details of the TIDEP-01015 3 Axis Board, Interface card connecting EVM and TIDEP-01015 3 Axis, or HDSL AM64xE1 Transceiver card, please contact TI via E2E/FAE.
 
 \cond SOC_AM243X
 ### Hardware Prerequisities for Booster Pack
 
-- HDSL encoder
+- HDSL Encoder(s)
-- AM243x-LP board
+- <a href="https://www.ti.com/tool/LP-AM243" target="_blank"> AM243x-LP Board </a>
 - <a href="https://www.ti.com/tool/BP-AM2BLDCSERVO" target="_blank"> BP-AM2BLDCSERVO </a>
 \endcond
 

docs_src/docs/api_guide/examples/pruicss_pwm_dutycycle.md

@@ -1,13 +1,13 @@
-# PRUICSS PWM Duty Cycle {#EXAMPLE_PRUICSS_PWM_DUTY_CYCLE}
+# PRU-ICSS PWM Duty Cycle {#EXAMPLE_PRUICSS_PWM_DUTY_CYCLE}
 
 [TOC]
 
 # Introduction
 
 This example generates a signal for a specified period and duty cycle using
-PRUICSS PWM. The period and duty cycle can be configured by the user.
+PRU-ICSS PWM. The period and duty cycle can be configured by the user.
 
-The example Uses PRUICSSG0 PWM module and does below
+The example Uses PRU-ICSSG0 PWM module and does below
 
 - Configures PWM0_0_POS(alias signal PWM0_A0) to generate a 1KHz signal with 25% duty cycle 
 - Configures PWM3_2_NEG(alias signal PWM3_B2) to generate a 1KHz signal with 25% duty cycle 
@@ -31,7 +31,7 @@ An IO Breakout Board (BB) is required to probe the PWM outputs
 #### Probe Output
 
 \imageStyle{duty_example_probe_output.png,width:70%}
-\image html duty_example_probe_output.png "PRUICSS PWM DUTY CYCLE PROBE OUTPUT"
+\image html duty_example_probe_output.png "PRU-ICSS PWM DUTY CYCLE PROBE OUTPUT"
 
 # Supported Combinations
 

docs_src/docs/api_guide/examples/pruicss_pwm_epwm_sync.md

@@ -1,13 +1,13 @@
-# PRUICSS PWM EPWM SYNC {#EXAMPLE_PRUICSS_PWM_EPWM_SYNC}
+# PRU-ICSS PWM EPWM SYNC {#EXAMPLE_PRUICSS_PWM_EPWM_SYNC}
 
 [TOC]
 
 # Introduction
 
 This example generates a signal for a specified period and duty cycle using
-PRUICSS PWM and SOC EPWM. The period and duty cycle can be configured by the user.
+PRU-ICSS PWM and SOC EPWM. The period and duty cycle can be configured by the user.
 
-The example Uses PRUICSSG0 PWM module and does below
+The example Uses PRU-ICSSG0 PWM module and does below
 
 - Configures EPWM0_CHANNEL_A to generate a 1KHz signal with 25% duty cycle
 - Configures EPWM0_SYNC_OUT to output high when SOC EPWM PERIOD VAL reaches zero
@@ -36,7 +36,7 @@ An IO Breakout Board (BB) is required to probe the PWM outputs
 #### Probe Output
 
 \imageStyle{epwm_pruicss_pwm_sync_probe_output.png,width:85%}
-\image html epwm_pruicss_pwm_sync_probe_output.png "PRUICSS PWM EPWM SYNC PROBE OUTPUT"
+\image html epwm_pruicss_pwm_sync_probe_output.png "PRU-ICSS PWM EPWM SYNC PROBE OUTPUT"
 
 # Supported Combinations
 

docs_src/docs/api_guide/examples/sdfm_continuous_nc_examples.md

@@ -2,7 +2,7 @@
 
 [TOC]
 
-This example does continuous normal current sampling. Normal current OSR can be configured by the user. There are two different examples based on number of %SDFM channels.
+This example does continuous normal current sampling. Normal current over-samping Ratio (OSR) can be configured by the user. There are two different examples based on number of %SDFM channels.
 
 # Three Channels with Continuous Mode
 
@@ -68,7 +68,8 @@ The example does the below
  ----------------|-----------
  CPU + OS        | r5fss0-0 freertos
  ICSSG           | ICSSG0
- PRU             | PRU0
+ PRU             | PRU0 (single channel)
+ ^               | PRU0, RTU-PRU0, TXPRU0 (multi channel using three PRUs - load share mode)
  Toolchain       | ti-arm-clang
  Board           | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
  Examples folder | examples/current_sense
@@ -79,17 +80,19 @@ The example does the below
 
 ## Hardware Prerequisites
 Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
-- TIDEP-01015 3 Axis board
+- <a href="../TIDEP-01015Rev E1.1(001)_Sch.pdf" target="_blank"> TIDEP-01015 3 Axis Board </a>
-- Interface card connecting EVM and TIDEP-01015 3 Axis board
+- <a href="../MS_TI_AM64x_EVM_3-AXIS_INTERFACE_BOARD_SCH_REV_E1.pdf" target="_blank"> Interface card connecting EVM and TIDEP-01015 3 Axis </a>
 - Signal generator
 
+\note For more design details of the TIDEP-01015 3 Axis Board, or Interface card connecting EVM and TIDEP-01015 3 Axis, please contact TI via E2E/FAE.
+
 ### Hardware Setup
 \image html SDFM_HwSetup_image.PNG  "Hardware Setup SDFM"
 \image html SDFM_EVM_HW_setup.png  "SDFM: EVM and 3axis board setup view"
 \cond SOC_AM243X
 ### Hardware Prerequisities for LP
 - AMC1035EVM
-- AM243x-LP board
+- <a href="https://www.ti.com/tool/LP-AM243" target="_blank"> AM243x-LP Board </a>
 - Signal generator
 
 #### LP Hardware Setup
@@ -102,7 +105,6 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 - **When using makefiles to build**, note the required combination and build using
   make command (see <a href="@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html" target="_blank"> Using SDK with Makefiles </a>)
 - Launch a CCS debug session and run the executable, see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html" target="_blank">  CCS Launch, Load and Run </a>
-- Refer to UART terminal for user interface menu options.
 
 ### Test Case Description
 <table>
@@ -119,11 +121,11 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 <tr>
         <td></td>
         <td>2. Draw the graph of sdfm_ch0_samples, sdfm_ch1_samples and sdfm_ch2_samples arrays</td>
-        <td>\image html SDFM_Continuous_mode_sample.PNG "NC sample data"</td>
+        <td>\image html SDFM_Continuous_mode_sample.PNG "NNCC sample data"</td>
  </tr>
 
 <tr>
-        <td>2. To check NC Samples with Different NC OSR Values</td>
+        <td>2. To check Normal Current (NC) Samples with Different NC OSR Values</td>
         <td>1. Set NC OSR values between 16 to 255 </td>
         <td>Raw data should have different resolution for different OSR values </td>
 </tr>

docs_src/docs/api_guide/examples/sdfm_examples.md

@@ -8,8 +8,8 @@ The ICSS %SDFM driver provides a well defined set of APIs to expose sigma delta
 
 The ICSS %SDFM examples invoke these APIs to
 - Set %SDFM channels
-- Set ACC source, NC OSR, OC OSR, Clock source & Clock inversion
+- Set Accumulator (ACC) source, Normal Current (NC) Over-samping Ratio (OSR), Over-current (OC) OSR, Clock source and Clock inversion
-- Enable & disable threshold comparators
+- Enable/disable threshold comparators
 - Set high and low threshold values
 - Enable Zero Cross & set Zero cross threshold value
 - configure normal current sample trigger time (time for read sample)
@@ -83,7 +83,8 @@ Following section describes the flow of the examples.
  ----------------|-----------
  CPU + OS        | r5fss0-0 freertos
  ICSSG           | ICSSG0
- PRU             | PRU0
+ PRU             | PRU0 (single channel)
+ ^               | PRU0, RTU-PRU0, TXPRU0 (multi channel using three PRUs - load share mode)
  Toolchain       | ti-arm-clang
  Board           | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
  Examples folder | examples/current_sense

docs_src/docs/api_guide/examples/sdfm_trigger_based_nc_example_with_phase_delay.md

@@ -5,7 +5,7 @@
 # ICSS SDFM three channel with phase compensation
 
 This example measures phase compensation for %SDFM channel 0 in PRU GPIO mode
-during initialization. Normal current OSR, Over current OSR and Normal current trigger time can be configured by the user
+during initialization. Normal current Over-samping Ratio (OSR), Over current OSR and Normal current trigger time can be configured by the user
 
 Only one core - PRU is used for this example.
 
@@ -78,7 +78,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 \cond SOC_AM243X
 ### Hardware Prerequisities for LP
 - AMC1035EVM
-- AM243x-LP board
+- <a href="https://www.ti.com/tool/LP-AM243" target="_blank"> AM243x-LP Board </a>
 - Signal generator
 
 #### LP Hardware Setup
@@ -92,7 +92,6 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 - **When using makefiles to build**, note the required combination and build using
   make command (see <a href="@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html" target="_blank"> Using SDK with Makefiles </a>)
 - Launch a CCS debug session and run the executable, see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html" target="_blank">  CCS Launch, Load and Run </a>
-- Refer to UART terminal for user interface menu options.
 
 ### Test Case Description
 <table>

docs_src/docs/api_guide/examples/sdfm_trigger_based_nc_examples.md

@@ -2,7 +2,7 @@
 
 [TOC]
 
-This example does trigger based normal current sampling. Normal current OSR, Over current OSR and Normal current trigger time can be configured by the user. There are two different examples based on number of %SDFM channels.
+This example does trigger based normal current sampling. Normal current Over-samping Ratio (OSR), Over current OSR and Normal current trigger time can be configured by the user. There are two different examples based on number of %SDFM channels.
 
 # Three Channels
 
@@ -64,7 +64,8 @@ The example does the below
  ----------------|-----------
  CPU + OS        | r5fss0-0 freertos
  ICSSG           | ICSSG0
- PRU             | PRU0
+ PRU             | PRU0 (single channel)
+ ^               | PRU0, RTU-PRU0, TXPRU0 (multi channel using three PRUs - load share mode)
  Toolchain       | ti-arm-clang
  Board           | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
  Examples folder | examples/current_sense
@@ -75,10 +76,11 @@ The example does the below
 
 ## Hardware Prerequisites
 Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
-- TIDEP-01015 3 Axis board
+- <a href="../TIDEP-01015Rev E1.1(001)_Sch.pdf" target="_blank"> TIDEP-01015 3 Axis Board </a>
-- Interface card connecting EVM and TIDEP-01015 3 Axis board
+- <a href="../MS_TI_AM64x_EVM_3-AXIS_INTERFACE_BOARD_SCH_REV_E1.pdf" target="_blank"> Interface card connecting EVM and TIDEP-01015 3 Axis </a>
 - Signal generator
 
+\note For more design details of the TIDEP-01015 3 Axis Board, or Interface card connecting EVM and TIDEP-01015 3 Axis, please contact TI via E2E/FAE.
 
 ### Hardware Setup
 \image html SDFM_HwSetup_image.PNG  "Hardware Setup SDFM"
@@ -86,7 +88,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 \cond SOC_AM243X
 ### Hardware Prerequisities for LP
 - AMC1035EVM
-- AM243x-LP board
+- <a href="https://www.ti.com/tool/LP-AM243" target="_blank"> AM243x-LP Board </a>
 - Signal generator
 
 #### LP Hardware Setup
@@ -99,7 +101,6 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 - **When using makefiles to build**, note the required combination and build using
   make command (see <a href="@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html" target="_blank"> Using SDK with Makefiles </a>)
 - Launch a CCS debug session and run the executable, see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html" target="_blank">  CCS Launch, Load and Run </a>
-- Refer to UART terminal for user interface menu options.
 
 ### Test Case Description
 <table>
@@ -120,7 +121,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
  </tr>
 
 <tr>
-        <td>2. To check raw data for Single Update (64 NC OSR)</td>
+        <td>2. To check raw data for Single Update (64 Normal Current (NC) OSR)</td>
         <td>1. Set NC OSR to 64</td>
         <td>The drawn graph and raw data should look like the attached image</td>
 </tr>
@@ -275,7 +276,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 </tr>
 <tr>
         <td>8. To check Zero Cross</td>
-        <td>1. Set OC OSR to 16</td>
+        <td>1. Set Overcurrent (OC) OSR to 16</td>
         <td> Logic analyzer capture should match with this capture </td>
 </tr>
 <tr>

docs_src/docs/api_guide/examples/tamagawa_example.md

@@ -16,18 +16,6 @@ A serial terminal application (like teraterm/ hyperterminal/ minicom) is then ru
 To configure, select the serial port corresponding to the port emulated over USB by the EVM.
 The host serial port should be configured to 115200 baud, no parity, 1 stop bit and no flow control.
 
-Connect the Tamagawa encoders via TIDA-00179 cards on a 3 axis board (TIDEP-01015) to the EVM.
-On AM243x LP, a Tamagawa encoder can be directly connected using a TIDA-00179 card.
-\note
-Only single channel configuration with Channel 0 is supported as of now on LP.
-
-The connections between AM243x LP and TIDA-00179 for Channel 0 are:
-
-TAMAGAWA_CHANNEL0_TX -> PRG0_PRU1_GPO1,
-TAMAGAWA_CHANNEL0_TX_ENABLE -> PRG0_PRU1_GPO2,
-TAMAGAWA_CHANNEL0_RX -> PRG0_PRU1_GPO13,
-TAMAGAWA_CHANNEL0_CLK -> PRG0_PRU1_GPO0.
-
 The Tamagawa receiver firmware running on ICSS0-PRU1 provides a defined interface. The Tamagawa diagnostic application interacts with the Tamagawa receiver firmware interface. It then presents the user with menu options to select Data ID code (as defined by Tamagawa) to be sent to the encoder. The application collects the data entered by the user and configures the relevant interface. Then via the Tamagawa receiver interface, the command is triggered. Once the command completion is indicated by the interface, the status of the transaction is checked. If the Status indicates success, the result is presented to the user.
 
 ## Important files and directory structure
@@ -76,7 +64,7 @@ The Tamagawa receiver firmware running on ICSS0-PRU1 provides a defined interfac
  ICSSG          | ICSSG0
  PRU            | PRU1
  Toolchain      | ti-arm-clang
- Board          | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER (E3 Revision)
+ Board          | @VAR_BOARD_NAME_LOWER (3 channel and 1 channel examples), @VAR_LP_BOARD_NAME_LOWER (2 channel and 1 channel examples)
  Example folder | examples/position_sense/tamagawa_diagnostic
 
 \endcond
@@ -85,16 +73,19 @@ The Tamagawa receiver firmware running on ICSS0-PRU1 provides a defined interfac
 
 ## Hardware Prerequisites
 Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, additional hardware required to run this demo is mentioned below
--  Tamagawa Encoders
+
+- Tamagawa Encoder(s)
 - <a href="http://www.ti.com/tool/TIDA-00179" target="_blank"> TIDA-00179 Universal Digital Interface to Absolute Position Encoders </a>
--  TIDEP-01015 3 Axis board
+- <a href="../TIDEP-01015Rev E1.1(001)_Sch.pdf" target="_blank"> TIDEP-01015 3 Axis Board </a>
--  Interface card connecting EVM and TIDEP-01015 3 Axis board
+- <a href="../MS_TI_AM64x_EVM_3-AXIS_INTERFACE_BOARD_SCH_REV_E1.pdf" target="_blank"> Interface card connecting EVM and TIDEP-01015 3 Axis </a>
+
+\note For more design details of the TIDEP-01015 3 Axis Board, or Interface card connecting EVM and TIDEP-01015 3 Axis, please contact TI via E2E/FAE.
 
 \cond SOC_AM243X
 ### Hardware Prerequisities for Booster Pack
 
-- Tamagawa encoder
+- Tamagawa Encoder(s)
-- AM243x-LP board
+- <a href="https://www.ti.com/tool/LP-AM243" target="_blank"> AM243x-LP Board </a>
 - <a href="https://www.ti.com/tool/BP-AM2BLDCSERVO" target="_blank"> BP-AM2BLDCSERVO </a>
 \endcond
 

docs_src/docs/api_guide/examples/transforms/transforms_test/transforms_test.md

@@ -1,4 +1,4 @@
-#  CLAKRE-PARK-ICLARKE-SVGEN Test {#EXAMPLES_TRANSFORMS_TEST}
+#  CLARKE-PARK-ICLARKE-SVGEN Test {#EXAMPLES_TRANSFORMS_TEST}
 
 [TOC]
 

docs_src/docs/api_guide/main_page/main_page.md

@@ -118,8 +118,14 @@ The main software components in the block diagram specific to motor control are
 </tr>
 <tr>
     <td> Transforms
-    <td>\ref Transforms
+    <td>\ref TRANSFORMS
-    <td> Transformation including Clarke, Park, Space Vector Generation used in motor control applications.
+    <td> Transformation including Clarke, Park, Space Vector Generation used in motor control applications
+</tr>
+<tr><td colspan="3" bgcolor=#F0F0F0>**PRU-ICSS PWM**</td></tr>
+<tr>
+    <td> PRU-ICSS PWM
+    <td>\ref PRUICSS_PWM
+    <td> Driver for using PRU-ICSS PWM Peripheral
 </tr>
 <tr><td colspan="3" bgcolor=#F0F0F0>**Examples and Demos**</td></tr>
 <tr>

source/dcl/dcl.h

@@ -37,9 +37,15 @@
 extern "C" {
 #endif
 
+ /**
+ * \defgroup RTLIBS_API APIs for Real Time Libraries
+ *
+ * This module contains APIs for real time libraries supported in this SDK.
+ */
+
 /**
  *  \defgroup DCL_API_MODULE APIs for Digital Control Library
- *  \ingroup  MOTOR_CONTROL_API
+ *  \ingroup  RTLIBS_API
  *  
  *  Here is the list of APIs used for Digital Control Library
  *  @{

source/transforms/clarke/clarke.h

@@ -40,7 +40,7 @@ extern "C"
 
 /**
  *  \defgroup TRANSFORMS_API_MODULE APIs for Transformation Algorithms
- *  \ingroup  MOTOR_CONTROL_API
+ *  \ingroup  RTLIBS_API
  *
  *  Here is the list of motor transformation function APIs
  *  @{

source/transforms/ipark/ipark.h

@@ -39,7 +39,7 @@ extern "C"
 #endif
 
 /**
- *  \addtogroup TRANSFORMS_API_MODULE APIs for motor transformations
+ *  \addtogroup TRANSFORMS_API_MODULE
  *  @{
  *
  *  \file   ipark.h

source/transforms/park/park.h

@@ -39,7 +39,7 @@ extern "C"
 #endif
 
 /**
- *  \addtogroup TRANSFORMS_API_MODULE APIs for motor transformations
+ *  \addtogroup TRANSFORMS_API_MODULE
  *  @{
  *
  *  \file           park.h

source/transforms/svgen/svgen.h

@@ -39,7 +39,7 @@ extern "C"
 #endif
 
 /**
- *  \addtogroup TRANSFORMS_API_MODULE APIs for motor transformations
+ *  \addtogroup TRANSFORMS_API_MODULE
  *  @{
  *
  *  \file       svgen.h