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am243x/am64x: Endat: Update register offset

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- Update register offset
- Update Multi channel single PRU firmware binary

Fixes: PINDSW-7125

Signed-off-by: Achala Ram <a-ram@ti.com>
This commit is contained in:
Achala Ram 2023-12-15 14:41:19 +05:30
parent b35879bd82
commit b89b36ccb1
2 changed files with 4 additions and 4 deletions
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6
source/position_sense/endat/firmware/endat_main.asm
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@ -460,7 +460,7 @@ SKIP_CLOCK_CONFIG1:
LOOP PROP_DELAY_MULTI_END, 3 LOOP PROP_DELAY_MULTI_END, 3
; # read position bits (offset ch[0,1,2]: [0x44, 0x64, 0x84]) ; # read position bits (offset ch[0,1,2]: [0x30, 0x40, 0x50])
LBCO &R2.b1, PRUx_DMEM, R8.b0, 1 LBCO &R2.b1, PRUx_DMEM, R8.b0, 1
; bypass prop delay estimation if encoder not detected for the ch, else would wait indefinitely in prop delay fn ; bypass prop delay estimation if encoder not detected for the ch, else would wait indefinitely in prop delay fn
@ -470,13 +470,13 @@ SKIP_CLOCK_CONFIG1:
CALL FN_PROP_DELAY_CALC CALL FN_PROP_DELAY_CALC
ENDAT_SKIP_PROP_DELAY_CALC: ENDAT_SKIP_PROP_DELAY_CALC:
; write prop delay (offset ch[0,1,2]: [0x28, 0x48, 0x68]) ; write prop delay (offset ch[0,1,2]: [0x34, 0x44, 0x48])
ADD R8.b0, R8.b0, 0x4 ADD R8.b0, R8.b0, 0x4
SBCO &R9, PRUx_DMEM, R8.b0, 4 SBCO &R9, PRUx_DMEM, R8.b0, 4
; update per ch variables for next channel ; update per ch variables for next channel
; 0x4 + 0x1C = 0x20, corresponds to i/f buffer of one channel ; 0x4 + 0x1C = 0x20, corresponds to i/f buffer of one channel
ADD R8.b0, R8.b0, 0x1C ADD R8.b0, R8.b0, 0x0C
ADD R3.b0, R3.b0, 1 ; ENDAT_TX_CHx_SEL ADD R3.b0, R3.b0, 1 ; ENDAT_TX_CHx_SEL
ADD R3.b1, R3.b1, 1 ; ENDAT_CHx_CLK ADD R3.b1, R3.b1, 1 ; ENDAT_CHx_CLK
ADD R3.b2, R3.b2, 1 ; ENDAT_CHx_SB ADD R3.b2, R3.b2, 1 ; ENDAT_CHx_SB

2
source/position_sense/endat/firmware/endat_master_multi_bin.h
View File

@ -105,7 +105,7 @@ const uint32_t EnDatFirmwareMulti_0[] = {
0x2305d29d, 0x2305d29d,
0x01040808, 0x01040808,
0x80083889, 0x80083889,
0x011c0808, 0x010c0808,
0x01010303, 0x01010303,
0x01012323, 0x01012323,
0x01014343, 0x01014343,