Pull request #107: am243x/am64x: pruicss_pwm: add pruicss pwm sync eg

Merge in PINDSW/motor_control_sdk from a0503545_pwm to next

* commit 'ba8a20b928bfa971fb02667d512c14f53abfc8f1':
  am243x/am64x: pruicss_pwm: add pruicss pwm sync eg
This commit is contained in:
Manoj Koppolu 2024-01-04 09:13:04 -06:00 committed by Pratheesh Gangadhar TK
commit 6e469ee341
49 changed files with 2245 additions and 430 deletions

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@ -1456,6 +1456,38 @@
]
]
},
{
"resourceType": "project.ccs",
"resourceClass": [
"example"
],
"resourceSubClass": [
"example.general"
],
"description": "A Pruicss Pwm Epwm Sync Example. CPU is R5FSS0-0 running FREERTOS.",
"name": "pruicss_pwm_epwm_sync",
"location": "../../examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
"devtools": [
"AM243x_GP_EVM"
],
"kernel": [
"freertos"
],
"compiler": [
"ticlang"
],
"subCategories": [
"pruicss_pwm",
"pruicss_pwm_epwm_sync",
"r5fss0-0_freertos"
],
"mainCategories": [
[
"Examples",
"Development Tools"
]
]
},
{
"resourceType": "project.ccs",
"resourceClass": [

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@ -262,6 +262,38 @@
]
]
},
{
"resourceType": "project.ccs",
"resourceClass": [
"example"
],
"resourceSubClass": [
"example.general"
],
"description": "A Pruicss Pwm Epwm Sync Example. CPU is R5FSS0-0 running FREERTOS.",
"name": "pruicss_pwm_epwm_sync",
"location": "../../examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
"devtools": [
"AM64x_GP_EVM"
],
"kernel": [
"freertos"
],
"compiler": [
"ticlang"
],
"subCategories": [
"pruicss_pwm",
"pruicss_pwm_epwm_sync",
"r5fss0-0_freertos"
],
"mainCategories": [
[
"Examples",
"Development Tools"
]
]
},
{
"resourceType": "web.page",
"resourceClass": [

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@ -22,6 +22,7 @@ const example_file_list = [
"examples/position_sense/tamagawa_diagnostic/multi_channel/.project/project.js",
"examples/position_sense/tamagawa_diagnostic/single_channel/.project/project.js",
"examples/pruicss_pwm/pruicss_pwm_duty_cycle/.project/project.js",
"examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project.js",
"source/position_sense/endat/firmware/multi_channel_load_share/.project/project.js",
"source/position_sense/endat/firmware/single_channel/.project/project.js",
"source/position_sense/endat/firmware/multi_channel_single_pru/.project/project.js",

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@ -37,7 +37,8 @@ Each Set has six signals (A0,A1,A2,B0,B1,B2) With Reference to Technical Referen
## Example Usage
\ref EXAMPLE_PRUICSS_PWM_DUTY_CYCLE
- \ref EXAMPLE_PRUICSS_PWM_DUTY_CYCLE
- \ref EXAMPLE_PRUICSS_PWM_EPWM_SYNC
## API

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@ -3,4 +3,5 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/hdsl_example.
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/endat_example.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_example.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_example.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/pruicss_pwm_dutycycle.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/pruicss_pwm_dutycycle.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/pruicss_pwm_epwm_sync.md

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@ -7,24 +7,6 @@
This example generates a signal for a specified period and duty cycle using
PRUICSS PWM. The period and duty cycle can be configured by the user.
\cond SOC_AM243X
## AM243X-EVM
The example Uses PRUICSSG1 PWM module and does below
- This example uses PRUICSSG1 PWM module as probing PRUICSSG0 PWM signals requires IO breakout board
- Configures PWM0_2_NEG(alias signal PWM0_B2) to generate a 1KHz signal with 25% duty cycle
- PWM0_2_NEG(alias signal PWM0_B2) uses IEP0 CMP6 EVENT to control Duty cycle and IEP0 CMP0 to control output Frequency
- Configures IEP0 CMP0 value with PWM0_2_NEG(alias signal PWM0_B2) output period value
- Configures IEP0 CMP6 value with PWM0_2_NEG(alias signal PWM0_B2) output duty cycle value
- Configures IEP counter reset on CMP0 event
- PRG1_PWM0_B2 can be probed on J16 PIN1
#### AM243X-EVM Probe Output
\imageStyle{am64x_am243x_evm_duty_example_probe_output.png,width:70%}
\image html am64x_am243x_evm_duty_example_probe_output.png "PRUICSS PWM DUTY CYCLE PROBE OUTPUT"
## AM243X-LP
The example Uses PRUICSSG0 PWM module and does below
- Configures PWM0_0_POS(alias signal PWM0_A0) to generate a 1KHz signal with 25% duty cycle
@ -36,33 +18,20 @@ The example Uses PRUICSSG0 PWM module and does below
- Configures IEP0 CMP6 value with PWM0_0_POS(alias signal PWM0_A0) output duty cycle value
- Configures IEP1 CMP12 value with PWM3_2_NEG(alias signal PWM3_B2) output duty cycle value
- PWM0_0_POS(alias signal PWM0_A0) and PWM3_2_NEG(alias signal PWM3_B2) will be in sync with respect to each other as IEP0 CMP0 value is used to control output period of these signals
#### AM243X-LP
- PRG0_PWM0_A0 can be probed on J1.5
- PRG0_PWM3_B2 can be probed on J2.8
#### AM243X-LP Probe Output
\image html am243x_lp_duty_example_probe_output.png "PRUICSS PWM DUTY CYCLE PROBE OUTPUT"
#### AM64X-EVM and AM243X-EVM
An IO Breakout Board (BB) is required to probe the PWM outputs
- PRG0_PWM0_A0 can be probed on J3.1 of IO Breakout Board
- PRG0_PWM3_B2 can be probed on J2.11 of IO Breakout Board
\endcond
\cond SOC_AM64X
## AM64X-EVM
The example Uses PRUICSSG1 PWM module and does below
- This example uses PRUICSSG1 PWM module as probing PRUICSSG0 PWM signals requires IO breakout board
- Configures PWM0_2_NEG(alias signal PWM0_B2) to generate a 1KHz signal with 25% duty cycle
- PWM0_2_NEG(alias signal PWM0_B2) uses IEP0 CMP6 EVENT to control Duty cycle and IEP0 CMP0 to control output Frequency
- Configures IEP0 CMP0 value with PWM0_2_NEG(alias signal PWM0_B2) output period value
- Configures IEP0 CMP6 value with PWM0_2_NEG(alias signal PWM0_B2) output duty cycle value
- Configures IEP counter reset on CMP0 event
- PRG1_PWM0_B2 can be probed on J16 PIN1
#### AM64X-EVM Probe Output
\imageStyle{am64x_am243x_evm_duty_example_probe_output.png,width:70%}
\image html am64x_am243x_evm_duty_example_probe_output.png "PRUICSS PWM DUTY CYCLE PROBE OUTPUT"
\endcond
#### Probe Output
\imageStyle{duty_example_probe_output.png,width:70%}
\image html duty_example_probe_output.png "PRUICSS PWM DUTY CYCLE PROBE OUTPUT"
# Supported Combinations

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@ -7,9 +7,6 @@
This example generates a signal for a specified period and duty cycle using
PRUICSS PWM and SOC EPWM. The period and duty cycle can be configured by the user.
\cond SOC_AM243X
## AM243X-LP
The example Uses PRUICSSG0 PWM module and does below
- Configures EPWM0_CHANNEL_A to generate a 1KHz signal with 25% duty cycle
@ -23,15 +20,23 @@ The example Uses PRUICSSG0 PWM module and does below
- Configures IEP1 CMP12 value with PWM3_2_NEG(alias signal PWM3_B2) output duty cycle value
- Configures IEP0 CMP0 value with zero to make state transition to intial on IEP counter reset
- PWM0_0_POS(alias signal PWM0_A0) and PWM3_2_NEG(alias signal PWM3_B2) and EPWM0_CHANNEL_A will be in sync with respect to each other as EPWM0_SYNC_OUT is used to control output period of these signals
#### AM243X-LP
- PRG0_PWM0_A0 can be probed on J1.5
- PRG0_PWM3_B2 can be probed on J2.8
- EPWM0_CHANNEL_A can be probed on J4.1
#### AM243X-LP Probe Output
\imageStyle{am243x_lp_soc_epwm_pruicss_pwm_sync_probe_output.png,width:85%}
\image html am243x_lp_soc_epwm_pruicss_pwm_sync_probe_output.png "PRUICSS PWM EPWM SYNC PROBE OUTPUT"
#### AM64X-EVM and AM243X-EVM
An IO Breakout Board (BB) is required to probe the PWM outputs
- PRG0_PWM0_A0 can be probed on J3.1 of IO Breakout Board
- PRG0_PWM3_B2 can be probed on J2.11 of IO Breakout Board
- EPWM0_CHANNEL_A can be probed on J6.1 of IO Breakout Board
\endcond
#### Probe Output
\imageStyle{epwm_pruicss_pwm_sync_probe_output.png,width:85%}
\image html epwm_pruicss_pwm_sync_probe_output.png "PRUICSS PWM EPWM SYNC PROBE OUTPUT"
# Supported Combinations
@ -46,6 +51,17 @@ The example Uses PRUICSSG0 PWM module and does below
\endcond
\cond SOC_AM243X
Parameter | Value
---------------|-----------
CPU + OS | r5fss0-0 freertos
Toolchain | ti-arm-clang
Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
Example folder | examples/pruicss_pwm/pruicss_pwm_epwm_sync
\endcond
# Steps to Run the Example
- **When using CCS projects to build**, import the CCS project for the required combination

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@ -48,7 +48,11 @@ const libs_freertos_r5f = {
],
};
const defines = {
common: [
"am243x_evm",
],
};
const lnkfiles = {
common: [
@ -101,6 +105,10 @@ function getComponentBuildProperty(buildOption) {
build_property.lnkfiles = lnkfiles;
build_property.syscfgfile = syscfgfile;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
if(buildOption.board=="am243x-evm"){
build_property.defines = defines;
}
if(buildOption.cpu.match(/r5f*/)) {
if(buildOption.os.match(/freertos*/) )

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@ -56,6 +56,12 @@ const lnkfiles = {
]
};
const defines = {
common: [
"am64x_evm",
],
};
const syscfgfile = "../example.syscfg";
const readmeDoxygenPageTag = "EXAMPLE_PRUICSS_PWM_DUTY_CYCLE";
@ -101,6 +107,10 @@ function getComponentBuildProperty(buildOption) {
build_property.syscfgfile = syscfgfile;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
if(buildOption.board=="am64x-evm"){
build_property.defines = defines;
}
if(buildOption.cpu.match(/r5f*/)) {
if(buildOption.os.match(/freertos*/) )
{

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@ -18,12 +18,17 @@ const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false);
const i2c1 = i2c.addInstance();
const pwm = scripting.addModule("/pru_icssg/pwm", {}, false);
const pwm1 = pwm.addInstance();
const pwm2 = pwm.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
i2c1.$name = "CONFIG_I2C0";
pruicss1.$name = "CONFIG_PRU_ICSS0";
pruicss1.instance = "ICSSG1";
pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0";
debug_log.enableUartLog = true;
@ -64,10 +69,23 @@ mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x80000000;
mpu_armv76.size = 31;
pwm1.$name = "CONFIG_PRU_ICSS_PWM0";
pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0";
pwm1.PRU_ICSSG0_PWM.A0.$assign = "PRG0_PRU0_GPO12";
pwm1.PRU_ICSSG0_PWM.A0.$used = true;
pwm2.$name = "CONFIG_PRU_ICSS_PWM1";
pwm2.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM3";
pwm2.PRU_ICSSG0_PWM.B2.$assign = "PRG0_PRU0_GPO5";
pwm2.PRU_ICSSG0_PWM.B2.$used = true;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
i2c1.I2C.$suggestSolution = "I2C0";
i2c1.I2C.SCL.$suggestSolution = "I2C0_SCL";
i2c1.I2C.SDA.$suggestSolution = "I2C0_SDA";
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";

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@ -1,163 +0,0 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_drivers_open_close.h"
#include "ti_board_open_close.h"
#include <pruicss_pwm.h>
#include <drivers/pruicss.h>
#include <drivers/pinmux.h>
/** \brief Global Structure pointer holding PRUICSSG1 memory Map. */
PRUICSS_Handle gPruIcssHandle;
/*
* This example uses the PRUICSS PWM module to generate a signal
* with a specified duty cycle.
*
* The default parameters are : Frequency : 1kHz, Duty cycle : 25%,
* All these parameters are configurable.
*
* In this example PWM0_2_NEG(alias signal B2) is used to generate the signal, the user can also
* select a different one.
*
* PWM0_2_NEG(alias signal B2) uses IEP0 CMP6 EVENT to control Duty cycle
* & IEP0 CMP0 to control output Frequency
* This example also showcases how to configure and use the PRUICSS PWM module.
*/
/*FIXME: IEP0_CLK_FREQ macro to be included in driver_config.h sysconfig generated file*/
#define PRUICSS_IEP0_CLK_FREQ (200000000U)
/* Modify this to change the IEP counter increment value*/
#define PRUICSS_IEP_COUNT_INCREMENT_VALUE (1U)
/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */
#define APP_PRUICSS_PWM_DUTY_CYCLE (25U)
/* Frequency of PWM output signal in Hz - 1 KHz is selected */
#define APP_PRUICSS_PWM_OUTPUT_FREQ (1U * 1000U)
/* PRD value - this determines the period */
#define APP_PRUICSS_PWM_PRD_VAL (((PRUICSS_IEP0_CLK_FREQ / APP_PRUICSS_PWM_OUTPUT_FREQ))*(PRUICSS_IEP_COUNT_INCREMENT_VALUE))
/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/
#define APP_PRUICSS_IEP0_COMP6_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100))
Pinmux_PerCfg_t gPinMuxMainDomainCfg1[] = {
/* PRU_ICSSG1_PWM0 pin config */
/* PRG1_PWM0_B2 -> PRG1_PRU0_GPO17 (U7) */
{
PIN_PRG1_PRU0_GPO17,
( PIN_MODE(3) | PIN_PULL_DISABLE )
},
{PINMUX_END, PINMUX_END}
};
void pruicss_iep_init(void *args)
{
int32_t status;
/*Disable IEP0 counter*/
status = PRUICSS_controlIepCounter(gPruIcssHandle, PRUICSS_IEP_INST0, 0);
DebugP_assert(SystemP_SUCCESS == status);
Pinmux_config(gPinMuxMainDomainCfg1, PINMUX_DOMAIN_ID_MAIN);
/*Intialize IEP0 count value*/
PRUICSS_PWM_setIepCounterLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, 0xFFFFFFFF);
PRUICSS_PWM_setIepCounterUpper_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, 0xFFFFFFFF);
/*configure cmp 0 value with APP_PRUICSS_PWM_PRD_VAL*/
status = PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, CMP_EVENT0, (APP_PRUICSS_PWM_PRD_VAL & 0xFFFFFFFF));
DebugP_assert(SystemP_SUCCESS == status);
/*configure cmp 6 value with APP_PRUICSS_IEP0_COMP6_VAL*/
status = PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, CMP_EVENT6, (APP_PRUICSS_IEP0_COMP6_VAL & 0xFFFFFFFF));
DebugP_assert(SystemP_SUCCESS == status);
/*Enable cmp 0 and cmp 6*/
status = PRUICSS_PWM_configureIepCompareEnable(gPruIcssHandle, PRUICSS_IEP_INST0, 0x41);
DebugP_assert(SystemP_SUCCESS == status);
/*Set IEP0 counter Increment value*/
status = PRUICSS_setIepCounterIncrementValue(gPruIcssHandle, PRUICSS_IEP_INST0, PRUICSS_IEP_COUNT_INCREMENT_VALUE);
DebugP_assert(SystemP_SUCCESS == status);
/*Enable cmp 0 reset of counter*/
PRUICSS_PWM_configureIepCmp0ResetEnable(gPruIcssHandle, PRUICSS_IEP_INST0, 0x1);
/*Enable IEP0 counter*/
status=PRUICSS_controlIepCounter(gPruIcssHandle, PRUICSS_IEP_INST0, 1);
DebugP_assert(SystemP_SUCCESS == status);
}
void pruicss_pwm_init(void *args)
{
int32_t status;
/*Enable IEP CMP flags to auto clear after state transition*/
status = PRUICSS_PWM_configurePwmEfficiencyModeEnable(gPruIcssHandle, 1);
DebugP_assert(SystemP_SUCCESS == status);
/*Enable compare0 trip reset */
PRUICSS_PWM_configurePwmCmp0TripResetEnable(gPruIcssHandle, PRUICSS_PWM_SET0, 1);
/*configure PWM B2 signal of set 0, intial state to low*/
status = PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle, PRUICSS_PWM_SET0, PRUICSS_PWM_INTIAL_STATE, PRUICSS_PWM_OUTPUT_LOW);
DebugP_assert(SystemP_SUCCESS == status);
/*configure PWM B2 signal of set 0, active state to high*/
status = PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle, PRUICSS_PWM_SET0, PRUICSS_PWM_ACTIVE_STATE, PRUICSS_PWM_OUTPUT_HIGH);
DebugP_assert(SystemP_SUCCESS == status);
}
void pruicss_pwm_duty_cycle_main(void *args)
{
int32_t status;
Drivers_open(); // check return status
status = Board_driversOpen();
DebugP_assert(SystemP_SUCCESS == status);
gPruIcssHandle = PRUICSS_open(CONFIG_PRU_ICSS0);
DebugP_assert(gPruIcssHandle != NULL);
pruicss_pwm_init(NULL);
pruicss_iep_init(NULL);
while (1)
{
ClockP_usleep(1);
}
Board_driversClose();
Drivers_close();
}

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@ -47,6 +47,7 @@
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
-Dam243x_evm
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
@ -98,7 +99,7 @@
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../pruicss_pwm_dutycycle.c" openOnCreation="false" excludeFromBuild="false" action="copy">
<file path="../../../pruicss_pwm_dutycycle.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>

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@ -66,6 +66,7 @@ INCLUDES_common := \
DEFINES_common := \
-DSOC_AM243X \
-Dam243x_evm \
CFLAGS_common := \
-mcpu=cortex-r5 \

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@ -17,6 +17,9 @@ const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const pwm = scripting.addModule("/pru_icssg/pwm", {}, false);
const pwm1 = pwm.addInstance();
const pwm2 = pwm.addInstance();
/**
* Write custom configuration values to the imported modules.
@ -53,6 +56,16 @@ mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
pwm1.$name = "CONFIG_PRU_ICSS_PWM0";
pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0";
pwm1.PRU_ICSSG0_PWM.A0.$assign = "PRG0_PRU0_GPO12";
pwm1.PRU_ICSSG0_PWM.A0.$used = true;
pwm2.$name = "CONFIG_PRU_ICSS_PWM1";
pwm2.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM3";
pwm2.PRU_ICSSG0_PWM.B2.$assign = "PRG0_PRU0_GPO5";
pwm2.PRU_ICSSG0_PWM.B2.$used = true;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to

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@ -98,7 +98,7 @@
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../pruicss_pwm_dutycycle.c" openOnCreation="false" excludeFromBuild="false" action="copy">
<file path="../../../pruicss_pwm_dutycycle.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>

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@ -8,6 +8,8 @@
/**
* Import the modules used in this configuration.
*/
const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false);
const i2c1 = i2c.addInstance();
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
const pruicss1 = pruicss.addInstance();
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
@ -18,12 +20,15 @@ const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
const pwm = scripting.addModule("/pru_icssg/pwm", {}, false);
const pwm1 = pwm.addInstance();
const pwm2 = pwm.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
i2c1.$name = "CONFIG_I2C0";
pruicss1.$name = "CONFIG_PRU_ICSS0";
pruicss1.instance = "ICSSG1";
pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0";
debug_log.enableUartLog = true;
@ -64,6 +69,16 @@ mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x80000000;
mpu_armv76.size = 31;
pwm1.$name = "CONFIG_PRU_ICSS_PWM0";
pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0";
pwm1.PRU_ICSSG0_PWM.A0.$assign = "PRG0_PRU0_GPO12";
pwm1.PRU_ICSSG0_PWM.A0.$used = true;
pwm2.$name = "CONFIG_PRU_ICSS_PWM1";
pwm2.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM3";
pwm2.PRU_ICSSG0_PWM.B2.$assign = "PRG0_PRU0_GPO5";
pwm2.PRU_ICSSG0_PWM.B2.$used = true;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
@ -71,3 +86,6 @@ mpu_armv76.size = 31;
*/
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
i2c1.I2C.$suggestSolution = "I2C0";
i2c1.I2C.SCL.$suggestSolution = "I2C0_SCL";
i2c1.I2C.SDA.$suggestSolution = "I2C0_SDA";

View File

@ -1,163 +0,0 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_drivers_open_close.h"
#include "ti_board_open_close.h"
#include <pruicss_pwm.h>
#include <drivers/pruicss.h>
#include <drivers/pinmux.h>
/** \brief Global Structure pointer holding PRUICSSG1 memory Map. */
PRUICSS_Handle gPruIcssHandle;
/*
* This example uses the PRUICSS PWM module to generate a signal
* with a specified duty cycle.
*
* The default parameters are : Frequency : 1kHz, Duty cycle : 25%,
* All these parameters are configurable.
*
* In this example PWM0_2_NEG(alias signal B2) is used to generate the signal, the user can also
* select a different one.
*
* PWM0_2_NEG(alias signal B2) uses IEP0 CMP6 EVENT to control Duty cycle
* & IEP0 CMP0 to control output Frequency
* This example also showcases how to configure and use the PRUICSS PWM module.
*/
/*FIXME: IEP0_CLK_FREQ macro to be included in driver_config.h sysconfig generated file*/
#define PRUICSS_IEP0_CLK_FREQ (200000000U)
/* Modify this to change the IEP counter increment value*/
#define PRUICSS_IEP_COUNT_INCREMENT_VALUE (1U)
/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */
#define APP_PRUICSS_PWM_DUTY_CYCLE (25U)
/* Frequency of PWM output signal in Hz - 1 KHz is selected */
#define APP_PRUICSS_PWM_OUTPUT_FREQ (1U * 1000U)
/* PRD value - this determines the period */
#define APP_PRUICSS_PWM_PRD_VAL (((PRUICSS_IEP0_CLK_FREQ / APP_PRUICSS_PWM_OUTPUT_FREQ))*(PRUICSS_IEP_COUNT_INCREMENT_VALUE))
/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/
#define APP_PRUICSS_IEP0_COMP6_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100))
Pinmux_PerCfg_t gPinMuxMainDomainCfg1[] = {
/* PRU_ICSSG1_PWM0 pin config */
/* PRG1_PWM0_B2 -> PRG1_PRU0_GPO17 (U7) */
{
PIN_PRG1_PRU0_GPO17,
( PIN_MODE(3) | PIN_PULL_DISABLE )
},
{PINMUX_END, PINMUX_END}
};
void pruicss_iep_init(void *args)
{
int32_t status;
/*Disable IEP0 counter*/
status = PRUICSS_controlIepCounter(gPruIcssHandle, PRUICSS_IEP_INST0, 0);
DebugP_assert(SystemP_SUCCESS == status);
Pinmux_config(gPinMuxMainDomainCfg1, PINMUX_DOMAIN_ID_MAIN);
/*Intialize IEP0 count value*/
PRUICSS_PWM_setIepCounterLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, 0xFFFFFFFF);
PRUICSS_PWM_setIepCounterUpper_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, 0xFFFFFFFF);
/*configure cmp 0 value with APP_PRUICSS_PWM_PRD_VAL*/
status = PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0, CMP_EVENT0, (APP_PRUICSS_PWM_PRD_VAL & 0xFFFFFFFF));
DebugP_assert(SystemP_SUCCESS == status);
/*configure cmp 6 value with APP_PRUICSS_IEP0_COMP6_VAL*/
status = PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle, PRUICSS_IEP_INST0,CMP_EVENT6, (APP_PRUICSS_IEP0_COMP6_VAL & 0xFFFFFFFF));
DebugP_assert(SystemP_SUCCESS == status);
/*Enable cmp 0 and cmp 6*/
status = PRUICSS_PWM_configureIepCompareEnable(gPruIcssHandle, PRUICSS_IEP_INST0, 0x41);
DebugP_assert(SystemP_SUCCESS == status);
/*Set IEP0 counter Increment value*/
status = PRUICSS_setIepCounterIncrementValue(gPruIcssHandle, PRUICSS_IEP_INST0, PRUICSS_IEP_COUNT_INCREMENT_VALUE);
DebugP_assert(SystemP_SUCCESS == status);
/*Enable cmp 0 reset of counter*/
PRUICSS_PWM_configureIepCmp0ResetEnable(gPruIcssHandle, PRUICSS_IEP_INST0, 0x1);
/*Enable IEP0 counter*/
status = PRUICSS_controlIepCounter(gPruIcssHandle, PRUICSS_IEP_INST0, 1);
DebugP_assert(SystemP_SUCCESS == status);
}
void pruicss_pwm_init(void *args)
{
int32_t status;
/*Enable IEP CMP flags to auto clear after state transition*/
status = PRUICSS_PWM_configurePwmEfficiencyModeEnable(gPruIcssHandle, 1);
DebugP_assert(SystemP_SUCCESS == status);
/*Enable compare0 trip reset */
PRUICSS_PWM_configurePwmCmp0TripResetEnable(gPruIcssHandle, PRUICSS_PWM_SET0, 1);
/*configure PWM B2 signal of set 0, intial state to low*/
status = PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle, PRUICSS_PWM_SET0, PRUICSS_PWM_INTIAL_STATE, PRUICSS_PWM_OUTPUT_LOW);
DebugP_assert(SystemP_SUCCESS == status);
/*configure PWM B2 signal of set 0, active state to high*/
status = PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle, PRUICSS_PWM_SET0, PRUICSS_PWM_ACTIVE_STATE, PRUICSS_PWM_OUTPUT_HIGH);
DebugP_assert(SystemP_SUCCESS == status);
}
void pruicss_pwm_duty_cycle_main(void *args)
{
int32_t status;
Drivers_open(); // check return status
status = Board_driversOpen();
DebugP_assert(SystemP_SUCCESS == status);
gPruIcssHandle = PRUICSS_open(CONFIG_PRU_ICSS0);
DebugP_assert(gPruIcssHandle != NULL);
pruicss_pwm_init(NULL);
pruicss_iep_init(NULL);
while (1)
{
ClockP_usleep(1);
}
Board_driversClose();
Drivers_close();
}

View File

@ -47,6 +47,7 @@
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM64X
-Dam64x_evm
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
@ -98,7 +99,7 @@
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../pruicss_pwm_dutycycle.c" openOnCreation="false" excludeFromBuild="false" action="copy">
<file path="../../../pruicss_pwm_dutycycle.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>

View File

@ -66,6 +66,7 @@ INCLUDES_common := \
DEFINES_common := \
-DSOC_AM64X \
-Dam64x_evm \
CFLAGS_common := \
-mcpu=cortex-r5 \

View File

@ -37,11 +37,6 @@
#include "ti_board_open_close.h"
#include <pruicss_pwm.h>
#include <drivers/pruicss.h>
#include <drivers/pinmux.h>
/** \brief Global Structure pointer holding PRUICSSG0 memory Map. */
PRUICSS_Handle gPruIcssHandle;
/*
* This example uses the PRUICSS PWM module to generate a signal
@ -61,6 +56,39 @@ PRUICSS_Handle gPruIcssHandle;
*
* This example also showcases how to configure and use the PRUICSS PWM module.
*/
#if defined(am243x_evm) || defined(am64x_evm)
#include <board/ioexp/ioexp_tca6424.h>
static TCA6424_Config gTCA6424_Config;
static void i2c_io_expander(void *args)
{
int32_t status = SystemP_SUCCESS;
TCA6424_Params tca6424Params;
TCA6424_Params_init(&tca6424Params);
status = TCA6424_open(&gTCA6424_Config, &tca6424Params);
uint32_t ioIndex;
if(status == SystemP_SUCCESS)
{
/* set P12 high which controls CPSW_FET_SEL -> enable PRU1 and PRU0 GPIOs */
ioIndex = 0x0a;
status = TCA6424_setOutput(
&gTCA6424_Config,
ioIndex,
TCA6424_OUT_STATE_HIGH);
/* Configure as output */
status += TCA6424_config(
&gTCA6424_Config,
ioIndex,
TCA6424_MODE_OUTPUT);
}
TCA6424_close(&gTCA6424_Config);
}
#endif
/** \brief Global Structure pointer holding PRUICSSG0 memory Map. */
PRUICSS_Handle gPruIcssHandle;
/*FIXME: IEP0_CLK_FREQ macro to be included in driver_config.h sysconfig generated file*/
#define PRUICSS_IEP0_CLK_FREQ (200000000U)
@ -79,26 +107,6 @@ PRUICSS_Handle gPruIcssHandle;
/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/
#define APP_PRUICSS_IEP1_COMP12_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM3_B2_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100))
/*FIXME: Add pinmux in sysconfig generated file*/
Pinmux_PerCfg_t gPinMuxMainDomainCfg1[] = {
/* PRU_ICSSG0_PWM0 pin config */
/* PRG0_PWM0_A0 -> PRG0_PRU0_GPO12 (K1) */
{
PIN_PRG0_PRU0_GPO12,
( PIN_MODE(3) | PIN_PULL_DISABLE )
},
/* PRU_ICSSG0_PWM3 pin config */
/* PRG0_PWM3_B2 -> PRG0_PRU0_GPO5 (F2) */
{
PIN_PRG0_PRU0_GPO5,
( PIN_MODE(3) | PIN_PULL_DISABLE )
},
{PINMUX_END, PINMUX_END}
};
void pruicss_iep_init(void *args)
{
@ -194,7 +202,10 @@ void pruicss_pwm_duty_cycle_main(void *args)
gPruIcssHandle = PRUICSS_open(CONFIG_PRU_ICSS0);
DebugP_assert(gPruIcssHandle != NULL);
Pinmux_config(gPinMuxMainDomainCfg1, PINMUX_DOMAIN_ID_MAIN);
#if defined(am243x_evm) || defined(am64x_evm)
/* Configure the IO Expander to connect the PRU IOs to HSE */
i2c_io_expander(NULL);
#endif
pruicss_pwm_init(NULL);

View File

@ -48,7 +48,11 @@ const libs_freertos_r5f = {
],
};
const defines = {
common: [
"am243x_evm",
],
};
const lnkfiles = {
common: [
@ -77,6 +81,7 @@ const templates_freertos_r5f =
const buildOptionCombos = [
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"},
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"}
];
function getComponentProperty() {
@ -101,6 +106,10 @@ function getComponentBuildProperty(buildOption) {
build_property.syscfgfile = syscfgfile;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
if(buildOption.board=="am243x-evm"){
build_property.defines = defines;
}
if(buildOption.cpu.match(/r5f*/)) {
if(buildOption.os.match(/freertos*/) )
{

View File

@ -0,0 +1,129 @@
let path = require('path');
let device = "am64x";
const files = {
common: [
"main.c",
"pruicss_pwm_epwm_sync.c"
],
};
/* Relative to where the makefile will be generated
* Typically at <example_folder>/<BOARD>/<core_os_combo>/<compiler>
*/
const filedirs = {
common: [
"..", /* core_os_combo base */
"../../..", /* Example base */
],
};
const libdirs_freertos = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib",
"${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib"
],
};
const includes_freertos_r5f = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0",
"${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include"
],
};
const libs_freertos_r5f = {
common: [
"freertos.am64x.r5f.ti-arm-clang.${ConfigName}.lib",
"drivers.am64x.r5f.ti-arm-clang.${ConfigName}.lib",
"board.am64x.r5f.ti-arm-clang.${ConfigName}.lib",
"pruicss_pwm.am64x.r5f.ti-arm-clang.${ConfigName}.lib",
],
};
const defines = {
common: [
"am64x_evm",
],
};
const lnkfiles = {
common: [
"linker.cmd",
]
};
const syscfgfile = "../example.syscfg";
const readmeDoxygenPageTag = "EXAMPLE_PRUICSS_PWM_EPWM_SYNC";
const templates_freertos_r5f =
[
{
input: ".project/templates/am64x/common/linker_r5f.cmd.xdt",
output: "linker.cmd",
},
{
input: ".project/templates/am64x/freertos/main_freertos.c.xdt",
output: "../main.c",
options: {
entryFunction: "pruicss_pwm_epwm_sync_main",
},
}
];
const buildOptionCombos = [
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am64x-evm", os: "freertos"},
];
function getComponentProperty() {
let property = {};
property.dirPath = path.resolve(__dirname, "..");
property.type = "executable";
property.name = "pruicss_pwm_epwm_sync";
property.isInternal = false;
property.buildOptionCombos = buildOptionCombos;
property.isSkipTopLevelBuild = false;
return property;
}
function getComponentBuildProperty(buildOption) {
let build_property = {};
build_property.files = files;
build_property.filedirs = filedirs;
build_property.lnkfiles = lnkfiles;
build_property.syscfgfile = syscfgfile;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
if(buildOption.board=="am64x-evm"){
build_property.defines = defines;
}
if(buildOption.cpu.match(/r5f*/)) {
if(buildOption.os.match(/freertos*/) )
{
build_property.includes = includes_freertos_r5f;
build_property.libdirs = libdirs_freertos;
build_property.libs = libs_freertos_r5f;
build_property.templates = templates_freertos_r5f;
}
}
return build_property;
}
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

View File

@ -0,0 +1,101 @@
/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00"
* @versions {"tool":"1.18.0+3266"}
*/
/**
* Import the modules used in this configuration.
*/
const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false);
const epwm1 = epwm.addInstance();
const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false);
const i2c1 = i2c.addInstance();
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
const pruicss1 = pruicss.addInstance();
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
const pwm = scripting.addModule("/pru_icssg/pwm", {}, false);
const pwm1 = pwm.addInstance();
const pwm2 = pwm.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
epwm1.$name = "CONFIG_EPWM0";
epwm1.EPWM.B.$used = false;
epwm1.EPWM.SYNCO.$used = false;
epwm1.EPWM.SYNCI.$used = false;
i2c1.$name = "CONFIG_I2C0";
pruicss1.$name = "CONFIG_PRU_ICSS0";
pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0";
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";
const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false);
const uart_v0_template1 = uart_v0_template.addInstance({}, false);
uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0";
debug_log.uartLog.child = uart_v0_template1;
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x80000000;
mpu_armv76.size = 31;
pwm1.$name = "CONFIG_PRU_ICSS_PWM0";
pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0";
pwm1.PRU_ICSSG0_PWM.A0.$assign = "PRG0_PRU0_GPO12";
pwm1.PRU_ICSSG0_PWM.A0.$used = true;
pwm2.$name = "CONFIG_PRU_ICSS_PWM1";
pwm2.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM3";
pwm2.PRU_ICSSG0_PWM.B2.$assign = "PRG0_PRU0_GPO5";
pwm2.PRU_ICSSG0_PWM.B2.$used = true;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
epwm1.EPWM.$suggestSolution = "EHRPWM0";
epwm1.EPWM.A.$suggestSolution = "GPMC0_AD3";
i2c1.I2C.$suggestSolution = "I2C1";
i2c1.I2C.SCL.$suggestSolution = "I2C1_SCL";
i2c1.I2C.SDA.$suggestSolution = "I2C1_SDA";
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";

View File

@ -0,0 +1,84 @@
/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void pruicss_pwm_epwm_sync_main(void *args);
void freertos_main(void *args)
{
pruicss_pwm_epwm_sync_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM2434_ALV"
/>
</when>
</applicability>
<project
title="Pruicss Pwm Epwm Sync"
name = "pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
Debug,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="3.2.0"
device="Cortex R.AM2434_ALV"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0
-I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
-Dam243x_evm
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib
-i${CG_TOOL_ROOT}/lib
-m=pruicss_pwm_epwm_sync.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part ALV --package ALV
"
description="A Pruicss Pwm Epwm Sync FREERTOS project">
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.release.lib
-ldrivers.am243x.r5f.ti-arm-clang.release.lib
-lboard.am243x.r5f.ti-arm-clang.release.lib
-lpruicss_pwm.am243x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.debug.lib
-ldrivers.am243x.r5f.ti-arm-clang.debug.lib
-lboard.am243x.r5f.ti-arm-clang.debug.lib
-lpruicss_pwm.am243x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../pruicss_pwm_epwm_sync.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLE_PRUICSS_PWM_EPWM_SYNC.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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@ -0,0 +1,148 @@
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is disabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > MSRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > MSRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > MSRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > MSRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > MSRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
}
/*
NOTE: Below memory is reserved for DMSC usage
- During Boot till security handoff is complete
0x701E0000 - 0x701FFFFF (128KB)
- After "Security Handoff" is complete (i.e at run time)
0x701F4000 - 0x701FFFFF (48KB)
Security handoff is complete when this message is sent to the DMSC,
TISCI_MSG_SEC_HANDOVER
This should be sent once all cores are loaded and all application
specific firewall calls are setup.
*/
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memory segments */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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@ -0,0 +1,310 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=pruicss_pwm_epwm_sync.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=pruicss_pwm_epwm_sync.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=pruicss_pwm_epwm_sync.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=pruicss_pwm_epwm_sync.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=pruicss_pwm_epwm_sync.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=pruicss_pwm_epwm_sync.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
main.c \
pruicss_pwm_epwm_sync.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0 \
-I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
-Dam243x_evm \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lpruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang pruicss_pwm_epwm_sync ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

View File

@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

View File

@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

View File

@ -0,0 +1,8 @@
/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"mcu_plus_sdk/source/kernel/freertos/rov/FreeRTOS.rov.js",
];

View File

@ -19,6 +19,9 @@ const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const pwm = scripting.addModule("/pru_icssg/pwm", {}, false);
const pwm1 = pwm.addInstance();
const pwm2 = pwm.addInstance();
/**
* Write custom configuration values to the imported modules.
@ -66,6 +69,16 @@ mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
pwm1.$name = "CONFIG_PRU_ICSS_PWM0";
pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0";
pwm1.PRU_ICSSG0_PWM.A0.$assign = "PRG0_PRU0_GPO12";
pwm1.PRU_ICSSG0_PWM.A0.$used = true;
pwm2.$name = "CONFIG_PRU_ICSS_PWM1";
pwm2.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM3";
pwm2.PRU_ICSSG0_PWM.B2.$assign = "PRG0_PRU0_GPO5";
pwm2.PRU_ICSSG0_PWM.B2.$used = true;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to

View File

@ -98,7 +98,7 @@
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../pruicss_pwm_epwm_sync.c" openOnCreation="false" excludeFromBuild="false" action="copy">
<file path="../../../pruicss_pwm_epwm_sync.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>

View File

@ -0,0 +1,100 @@
/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM64x" --package "ALV" --part "Default" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00"
* @versions {"tool":"1.18.0+3266"}
*/
/**
* Import the modules used in this configuration.
*/
const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false);
const epwm1 = epwm.addInstance();
const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false);
const i2c1 = i2c.addInstance();
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
const pruicss1 = pruicss.addInstance();
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
const pwm = scripting.addModule("/pru_icssg/pwm", {}, false);
const pwm1 = pwm.addInstance();
const pwm2 = pwm.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
epwm1.$name = "CONFIG_EPWM0";
epwm1.EPWM.B.$used = false;
epwm1.EPWM.SYNCO.$used = false;
epwm1.EPWM.SYNCI.$used = false;
i2c1.$name = "CONFIG_I2C0";
pruicss1.$name = "CONFIG_PRU_ICSS0";
pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0";
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";
const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false);
const uart_v0_template1 = uart_v0_template.addInstance({}, false);
uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0";
debug_log.uartLog.child = uart_v0_template1;
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x80000000;
mpu_armv76.size = 31;
pwm1.$name = "CONFIG_PRU_ICSS_PWM0";
pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0";
pwm1.PRU_ICSSG0_PWM.A0.$assign = "PRG0_PRU0_GPO12";
pwm1.PRU_ICSSG0_PWM.A0.$used = true;
pwm2.$name = "CONFIG_PRU_ICSS_PWM1";
pwm2.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM3";
pwm2.PRU_ICSSG0_PWM.B2.$assign = "PRG0_PRU0_GPO5";
pwm2.PRU_ICSSG0_PWM.B2.$used = true;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
epwm1.EPWM.$suggestSolution = "EHRPWM0";
epwm1.EPWM.A.$suggestSolution = "GPMC0_AD3";
i2c1.I2C.$suggestSolution = "I2C1";
i2c1.I2C.SCL.$suggestSolution = "I2C1_SCL";
i2c1.I2C.SDA.$suggestSolution = "I2C1_SDA";
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";

View File

@ -0,0 +1,84 @@
/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void pruicss_pwm_epwm_sync_main(void *args);
void freertos_main(void *args)
{
pruicss_pwm_epwm_sync_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

View File

@ -0,0 +1,116 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM64x"
/>
</when>
</applicability>
<project
title="Pruicss Pwm Epwm Sync"
name = "pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
Debug,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="3.2.0"
device="Cortex R.AM64x"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0
-I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM64X
-Dam64x_evm
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib
-i${CG_TOOL_ROOT}/lib
-m=pruicss_pwm_epwm_sync.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am64x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part Default --package ALV
"
description="A Pruicss Pwm Epwm Sync FREERTOS project">
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am64x.r5f.ti-arm-clang.release.lib
-ldrivers.am64x.r5f.ti-arm-clang.release.lib
-lboard.am64x.r5f.ti-arm-clang.release.lib
-lpruicss_pwm.am64x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am64x.r5f.ti-arm-clang.debug.lib
-ldrivers.am64x.r5f.ti-arm-clang.debug.lib
-lboard.am64x.r5f.ti-arm-clang.debug.lib
-lpruicss_pwm.am64x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../pruicss_pwm_epwm_sync.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am64x/EXAMPLE_PRUICSS_PWM_EPWM_SYNC.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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@ -0,0 +1,148 @@
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is disabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > MSRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > MSRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > MSRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > MSRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > MSRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
}
/*
NOTE: Below memory is reserved for DMSC usage
- During Boot till security handoff is complete
0x701E0000 - 0x701FFFFF (128KB)
- After "Security Handoff" is complete (i.e at run time)
0x701F4000 - 0x701FFFFF (48KB)
Security handoff is complete when this message is sent to the DMSC,
TISCI_MSG_SEC_HANDOVER
This should be sent once all cores are loaded and all application
specific firewall calls are setup.
*/
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memory segments */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x80
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x80, LENGTH = 0x00004000 - 0x80
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

View File

@ -0,0 +1,311 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=pruicss_pwm_epwm_sync.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=pruicss_pwm_epwm_sync.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=pruicss_pwm_epwm_sync.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=pruicss_pwm_epwm_sync.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=pruicss_pwm_epwm_sync.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=pruicss_pwm_epwm_sync.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=pruicss_pwm_epwm_sync.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
main.c \
pruicss_pwm_epwm_sync.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0 \
-I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \
-Igenerated \
DEFINES_common := \
-DSOC_AM64X \
-Dam64x_evm \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am64x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am64x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am64x.r5f.ti-arm-clang.${ConfigName}.lib \
-lpruicss_pwm.am64x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am64x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am64x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am64x.r5f.ti-arm-clang.${ConfigName}.lib \
pruicss_pwm.am64x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am64x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am64x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am64x:r5fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am64x:r5fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am64x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am64x:r5fss0-0:freertos:ti-arm-clang pruicss_pwm_epwm_sync ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part Default --package ALV --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM64x --context r5fss0-0 --part Default --package ALV --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_a53ss0-0 = 0
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

View File

@ -0,0 +1,107 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_a53ss0-0 = 0
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

View File

@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

View File

@ -0,0 +1,8 @@
/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"mcu_plus_sdk/source/kernel/freertos/rov/FreeRTOS.rov.js",
];

View File

@ -42,6 +42,38 @@
#include <drivers/pruicss.h>
#include <drivers/pinmux.h>
#if defined(am243x_evm) || defined(am64x_evm)
#include <board/ioexp/ioexp_tca6424.h>
static TCA6424_Config gTCA6424_Config;
static void i2c_io_expander(void *args)
{
int32_t status = SystemP_SUCCESS;
TCA6424_Params tca6424Params;
TCA6424_Params_init(&tca6424Params);
status = TCA6424_open(&gTCA6424_Config, &tca6424Params);
uint32_t ioIndex;
if(status == SystemP_SUCCESS)
{
/* set P12 high which controls CPSW_FET_SEL -> enable PRU1 and PRU0 GPIOs */
ioIndex = 0x0a;
status = TCA6424_setOutput(
&gTCA6424_Config,
ioIndex,
TCA6424_OUT_STATE_HIGH);
/* Configure as output */
status += TCA6424_config(
&gTCA6424_Config,
ioIndex,
TCA6424_MODE_OUTPUT);
}
TCA6424_close(&gTCA6424_Config);
}
#endif
/* Frequency of PWM output signal in Hz - 1 KHz is selected */
#define SOC_EPWM_OUTPUT_FREQ (1U * 1000U)
/* TB frequency in Hz - so that /4 divider is used */
@ -70,25 +102,6 @@
/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/
#define APP_PRUICSS_IEP1_COMP12_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM3_B2_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100))
/*FIXME: Add pinmux in sysconfig generated file*/
Pinmux_PerCfg_t gPinMuxMainDomainCfg1[] = {
/* PRU_ICSSG0_PWM0 pin config */
/* PRG0_PWM0_A0 -> PRG0_PRU0_GPO12 (K1) */
{
PIN_PRG0_PRU0_GPO12,
( PIN_MODE(3) | PIN_PULL_DISABLE )
},
/* PRU_ICSSG0_PWM3 pin config */
/* PRG0_PWM3_B2 -> PRG0_PRU0_GPO5 (F2) */
{
PIN_PRG0_PRU0_GPO5,
( PIN_MODE(3) | PIN_PULL_DISABLE )
},
{PINMUX_END, PINMUX_END}
};
/* Function Prototypes */
static void App_epwmConfig(uint32_t epwmBaseAddr, uint32_t epwmCh, uint32_t epwmFuncClk);
static void pruicss_iep_init(void *args);
@ -110,8 +123,11 @@ void pruicss_pwm_epwm_sync_main(void *args)
gPruIcssHandle = PRUICSS_open(CONFIG_PRU_ICSS0);
DebugP_assert(gPruIcssHandle != NULL);
Pinmux_config(gPinMuxMainDomainCfg1, PINMUX_DOMAIN_ID_MAIN);
#if defined(am243x_evm) || defined(am64x_evm)
/* Configure the IO Expander to connect the PRU IOs to HSE */
i2c_io_expander(NULL);
#endif
pruicss_pwm_init(NULL);
pruicss_iep_init(NULL);

View File

@ -92,6 +92,7 @@ help:
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@ -284,6 +285,7 @@ BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_three_channel_with_phase_compensation_am243
BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang
# Various System Example Targets
BUILD_COMBO_EXAMPLE_ALL += single_chip_servo_am243x-lp_system_freertos_nortos
@ -447,6 +449,9 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all
pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
@ -573,6 +578,7 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_three_channel_with_phase_compensation
BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
# Various System Example Clean Targets
BUILD_COMBO_EXAMPLE_CLEAN_ALL += single_chip_servo_am243x-lp_system_freertos_nortos_clean
@ -736,6 +742,9 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean
pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
@ -862,6 +871,7 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_three_channel_with_phase_compensation
BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
# Various System Example Scrub Targets
BUILD_COMBO_EXAMPLE_SCRUB_ALL += single_chip_servo_am243x-lp_system_freertos_nortos_scrub
@ -1025,6 +1035,9 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub

View File

@ -54,6 +54,7 @@ help:
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-rtupru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-txpru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@ -176,6 +177,7 @@ BUILD_COMBO_EXAMPLE_ALL += hdsl_diagnostic_single_channel_am64x-evm_r5fss0-0_fre
BUILD_COMBO_EXAMPLE_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang
# Various System Example Targets
BUILD_COMBO_EXAMPLE_PRIVATE_ALL =
@ -225,6 +227,9 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile all
@ -281,6 +286,7 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += hdsl_diagnostic_single_channel_am64x-evm_r5fss0
BUILD_COMBO_EXAMPLE_CLEAN_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean
# Various System Example Clean Targets
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL =
@ -330,6 +336,9 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile clean
@ -386,6 +395,7 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += hdsl_diagnostic_single_channel_am64x-evm_r5fss0
BUILD_COMBO_EXAMPLE_SCRUB_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
# Various System Example Scrub Targets
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL =
@ -435,6 +445,9 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile scrub

View File

@ -49,6 +49,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_three_channel_with_phase_
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build
# Various System Example Projectspec Build Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += single_chip_servo_am243x-lp_system_freertos_nortos_build
@ -212,6 +213,9 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
@ -339,6 +343,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_three_channel_with_phase_
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
# Various System Example Projectspec Clean Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += single_chip_servo_am243x-lp_system_freertos_nortos_clean
@ -502,6 +507,9 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
@ -629,6 +637,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_three_channel_with_phase
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export
# Various System Example Projectspec Export Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += single_chip_servo_am243x-lp_system_freertos_nortos_export
@ -792,6 +801,9 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
pruicss_pwm_epwm_sync_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
@ -944,6 +956,7 @@ help:
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]

View File

@ -15,6 +15,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += hdsl_diagnostic_single_channel_am64
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build
# Various System Example Projectspec Build Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL =
@ -64,6 +65,9 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_build:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec all
@ -121,6 +125,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += hdsl_diagnostic_single_channel_am64
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean
# Various System Example Projectspec Clean Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL =
@ -170,6 +175,9 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec clean
@ -227,6 +235,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += hdsl_diagnostic_single_channel_am6
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export
# Various System Example Projectspec Export Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL =
@ -276,6 +285,9 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
pruicss_pwm_epwm_sync_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_export:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec export
@ -358,6 +370,7 @@ help:
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-rtupru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-txpru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]

View File

@ -5,6 +5,7 @@ const topModules_main = [
"/position_sense/endat",
"/position_sense/hdsl",
"/position_sense/tamagawa",
"/pru_icssg/pwm"
];
const topModules_mcu = [