From 6b8d4c32cc95d7ac358ae2681802de1d352a8fec Mon Sep 17 00:00:00 2001 From: Dhaval Khandla Date: Tue, 22 Aug 2023 12:05:04 +0530 Subject: [PATCH] am64x/am243x: hdsl: Fix reset behaviour after triggering manual reset - Remove HALT instructions - Clear all registers after reset Fixes: PINDSW-6492 Signed-off-by: Dhaval Khandla --- .../position_sense/hdsl/firmware/datalink.asm | 5 -- .../hdsl/firmware/datalink_init.asm | 4 +- .../firmware/hdsl_master_icssg_300_mhz_bin.h | 89 +++++++++---------- 3 files changed, 44 insertions(+), 54 deletions(-) diff --git a/source/position_sense/hdsl/firmware/datalink.asm b/source/position_sense/hdsl/firmware/datalink.asm index dbfe57f..725c22a 100644 --- a/source/position_sense/hdsl/firmware/datalink.asm +++ b/source/position_sense/hdsl/firmware/datalink.asm @@ -1402,7 +1402,6 @@ calculation_for_wait_done: mov REG_TMP11, RET_ADDR1 qbeq send_stuffing_no_stuffing, NUM_STUFFING, 0 ;check if we have stuffing - ;halt READ_CYCLCNT REG_TMP0 rsb REG_TMP2, REG_TMP0, (5*(CLKDIV_NORMAL+1)+4);(6*(CLKDIV_NORMAL+1)+4) mov REG_FNC.b3, NUM_STUFFING @@ -1600,10 +1599,6 @@ qm_add: and QM, QM, 0x7f ;check if negative (bit 7 indicates there is a link -> check bit 6) qbbc qm_add_no_reset, QM, 6 - ; set EDIO28 - ;ldi32 REG_TMP1, 0x02e300 - ;sbbo ®_TMP1.b0, REG_TMP1, 0x13, 1 - halt ldi QM, 0 ;update MASTER_QM sbco &QM, MASTER_REGS_CONST, MASTER_QM, 1 diff --git a/source/position_sense/hdsl/firmware/datalink_init.asm b/source/position_sense/hdsl/firmware/datalink_init.asm index f45c470..640a3a0 100644 --- a/source/position_sense/hdsl/firmware/datalink_init.asm +++ b/source/position_sense/hdsl/firmware/datalink_init.asm @@ -54,10 +54,10 @@ relocatable0: datalink_init_start: +datalink_reset: ;State RESET zero &r0, 124 ;send 2 times -datalink_reset: ;setup ICSS encoder peripheral for Hiperface DSL ldi DISPARITY, 0x00 @@ -546,7 +546,6 @@ datalink_learn_end: qba datalink_learn2_before ;-------------------------------------------------------------------------------------------------- datalink_abort2: - halt qbbs datalink_abort2_no_wait, r30, RX_ENABLE ;changed here from 24 to 26 WAIT_TX_DONE .if $defined("FREERUN_300_MHZ") @@ -561,7 +560,6 @@ datalink_abort2: NOP_2 .endif datalink_abort3: - halt datalink_abort2_no_wait: lbco ®_TMP0.b0, MASTER_REGS_CONST, NUM_RESETS, 1 add REG_TMP0.b0, REG_TMP0.b0, 1 diff --git a/source/position_sense/hdsl/firmware/hdsl_master_icssg_300_mhz_bin.h b/source/position_sense/hdsl/firmware/hdsl_master_icssg_300_mhz_bin.h index aff99b6..79e8506 100644 --- a/source/position_sense/hdsl/firmware/hdsl_master_icssg_300_mhz_bin.h +++ b/source/position_sense/hdsl/firmware/hdsl_master_icssg_300_mhz_bin.h @@ -55,7 +55,7 @@ */ const unsigned int Hiperface_DSL2_0[]= { -0x21067d00, +0x21067a00, 0x24000125, 0x2eff818f, 0x24001d8d, @@ -151,7 +151,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0xd104ff00, 0xd703ffff, 0x24002f1e, -0x23046c9d, +0x23046b9d, 0x05014545, 0x4f0045d2, 0x24000070, @@ -170,7 +170,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x1e05cdcd, 0x0b018001, 0x14000130, -0x230277d1, +0x230276d1, 0x6f0005f7, 0x240120eb, 0xf0cd0b0d, @@ -189,7 +189,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x1e05cdcd, 0x0b018001, 0x14000130, -0x230277d1, +0x230276d1, 0x6f0005f7, 0x24000001, 0x1c2d5050, @@ -212,7 +212,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x1f00cdcd, 0x0b018021, 0x14002130, -0x230277d1, +0x230276d1, 0x110fcdc0, 0x240168eb, 0xf0c00b00, @@ -237,7 +237,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x1e05cdcd, 0x0b018001, 0x14000130, -0x230277d1, +0x230276d1, 0x6f0005f7, 0x240120eb, 0xf0cd0b0d, @@ -256,7 +256,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x1e05cdcd, 0x0b018001, 0x14000130, -0x230277d1, +0x230276d1, 0x6f0005f7, 0x24000001, 0x1c2d5050, @@ -279,7 +279,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x1f00cdcd, 0x0b018021, 0x14002130, -0x230277d1, +0x230276d1, 0x110fcdc0, 0x240168eb, 0xf0c00b00, @@ -296,7 +296,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x20d10000, 0x24000605, 0x2eff8283, -0x230262d1, +0x230261d1, 0x240000c0, 0x2400002d, 0x230069d1, @@ -451,9 +451,9 @@ const unsigned int Hiperface_DSL2_0[]= { 0x808113c1, 0xc901c405, 0x69084502, -0x21028400, +0x21028300, 0x69074502, -0x2102df00, +0x2102de00, 0x51000c2b, 0x51015b04, 0x100c0c02, @@ -523,14 +523,14 @@ const unsigned int Hiperface_DSL2_0[]= { 0x12006d6d, 0x09064d4d, 0xc901c402, -0x2103dd00, +0x2103dc00, 0xd104ff00, 0xd703ffff, 0x106d6d1e, 0x511f0d03, 0x51190d02, 0x79000003, -0x230644d1, +0x230641d1, 0x7900001a, 0xd104ff00, 0xd703ffff, @@ -542,7 +542,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x511f0d12, 0x51190d11, 0xc901c402, -0x21032200, +0x21032100, 0x910c3c81, 0x240117e0, 0x04e1e0e0, @@ -637,7 +637,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x1f00c0c0, 0x1f008181, 0x81505880, -0x2104f700, +0x2104f500, 0x91042580, 0xd708e0ff, 0x91042580, @@ -651,11 +651,10 @@ const unsigned int Hiperface_DSL2_0[]= { 0xcf08e0ff, 0x20d10000, 0x117f6666, -0xc9066605, -0x2a000000, +0xc9066604, 0x24000066, 0x81031866, -0x7f0000da, +0x7f0000db, 0x710f6602, 0x24000f66, 0x590e6604, @@ -770,7 +769,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x813a188d, 0x24000019, 0x79000002, -0x2304d6d1, +0x2304d5d1, 0x10535300, 0x10333320, 0x10131340, @@ -933,7 +932,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x24003001, 0xd1066b0e, 0x2400010d, -0x23066fd1, +0x23066cd1, 0x68ab8d45, 0x13803b3b, 0x913d1880, @@ -946,7 +945,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x81531800, 0x7900003b, 0x2400020d, -0x23066fd1, +0x23066cd1, 0x688b8d38, 0x8137184b, 0x13803b3b, @@ -989,7 +988,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x1d09c4c4, 0x2400040d, 0x24003001, -0x23066fd1, +0x23066cd1, 0x15ff8d9c, 0x69005c34, 0x51009c33, @@ -1230,7 +1229,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x108787c7, 0x04c98087, 0x108080c9, -0x2304bdd1, +0x2304bcd1, 0x108b8b9d, 0x91aa1800, 0x1f018000, @@ -1250,7 +1249,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x108787c7, 0x04c98087, 0x108080c9, -0x2304bdd1, +0x2304bcd1, 0x91983880, 0x10eeeee1, 0x24000061, @@ -1343,7 +1342,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x810b1800, 0x81441800, 0x2eff8383, -0x23027c9d, +0x23027b9d, 0x24000866, 0x2400000c, 0x2400002c, @@ -1373,7 +1372,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x9101185b, 0x51005b0e, 0x7900000d, -0x23062cd1, +0x230629d1, 0x91dc388c, 0x240000e2, 0x91e21882, @@ -1381,7 +1380,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x100c0c2a, 0x106c6c4a, 0x102c2c6a, -0x23062cd1, +0x230629d1, 0x0b01e2e2, 0x0501e2e2, 0x4f00e2ff, @@ -1504,15 +1503,14 @@ const unsigned int Hiperface_DSL2_0[]= { 0x0b077200, 0x12001313, 0x0901f2f2, -0x230638d1, +0x230635d1, 0x510e6506, 0x6f010df6, 0x10656546, 0x05012525, 0x4f002595, -0x7900001c, -0x2a000000, -0xd118fe0c, +0x7900001a, +0xd118fe0b, 0xd105ff00, 0x31010001, 0x31010001, @@ -1523,7 +1521,6 @@ const unsigned int Hiperface_DSL2_0[]= { 0x31010001, 0x31010001, 0x31010001, -0x2a000000, 0x91a91800, 0x01010000, 0x81a91800, @@ -1537,34 +1534,34 @@ const unsigned int Hiperface_DSL2_0[]= { 0x813d1800, 0xc9022002, 0x2400269f, -0x7f00002d, +0x7f00002e, 0x24000925, 0xd104ff00, 0xd703ffff, 0x24001b8d, 0x23016a9d, -0x2305fe9d, -0x230638d1, -0x6f010dea, +0x2305fb9d, +0x230635d1, +0x6f010deb, 0x05012525, 0x4f0025f8, 0x24001025, 0x24001c8d, 0x23016a9d, -0x2305fe9d, -0x230638d1, -0x6f010dd6, +0x2305fb9d, +0x230635d1, +0x6f010dd8, 0x05012525, 0x4f0025fa, 0x810a1846, 0x24001d8d, 0x23016a9d, 0x2300ef9d, -0x6e0403cf, -0x6e2423ce, +0x6e0403d1, +0x6e2423d0, 0x110f4300, 0x0b044320, -0x6e2000cb, +0x6e2000cd, 0x10848480, 0x10434340, 0x10404001, @@ -1590,7 +1587,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x2301f7d1, 0x21001600, 0x24002005, -0x230262d1, +0x230261d1, 0x24000080, 0x2405a4eb, 0x2eff8992, @@ -1603,7 +1600,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x10000020, 0x0b018001, 0x14000130, -0x230277d1, +0x230276d1, 0x6f0005f6, 0x24001d05, 0xc918ff00, @@ -1615,7 +1612,7 @@ const unsigned int Hiperface_DSL2_0[]= { 0x10000020, 0x0b018001, 0x14000130, -0x230277d1, +0x230276d1, 0x6f0105f6, 0xc918ff00, 0x101f1f00, @@ -1719,4 +1716,4 @@ const unsigned int Hiperface_DSL2_0[]= { 0x91003c82, 0x1308e2e2, 0x81003c82, -0x2104f600 }; +0x2104f500 };