am64x/am243x: hdsl: Remove SUC instruction usage

- SUC instruction does not work as expected

Fixes: PINDSW-6531

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
This commit is contained in:
Dhaval Khandla 2023-08-22 17:00:53 +05:30
parent 0fe32fbc31
commit 47b87f5cf7
2 changed files with 32 additions and 26 deletions

View File

@ -55,7 +55,7 @@
*/
const unsigned int Hiperface_DSL2_0[]= {
0x21067500,
0x21067700,
0x24000125,
0x2eff818f,
0x24001d8d,
@ -151,7 +151,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0xd104ff00,
0xd703ffff,
0x24002f1e,
0x2304669d,
0x2304689d,
0x05014545,
0x4f0045d2,
0x24000070,
@ -453,7 +453,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x69084502,
0x21028200,
0x69074502,
0x2102dd00,
0x2102df00,
0x51000c2b,
0x51015b04,
0x100c0c02,
@ -522,14 +522,14 @@ const unsigned int Hiperface_DSL2_0[]= {
0x0b024d00,
0x12006d6d,
0x09064d4d,
0x2103db00,
0x2103dd00,
0xd104ff00,
0xd703ffff,
0x106d6d1e,
0x511f0d03,
0x51190d02,
0x79000003,
0x23063cd1,
0x23063ed1,
0x7900001a,
0xd104ff00,
0xd703ffff,
@ -541,7 +541,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x511f0d12,
0x51190d11,
0xc901c402,
0x21032000,
0x21032200,
0x910c3c81,
0x240117e0,
0x04e1e0e0,
@ -636,7 +636,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x1f00c0c0,
0x1f008181,
0x81505880,
0x2104f000,
0x2104f200,
0x91042580,
0xd708e0ff,
0x91042580,
@ -717,7 +717,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x2400060d,
0x040d6666,
0x230252d1,
0x7900003f,
0x79000041,
0x2400010d,
0x000d6666,
0x230252d1,
@ -729,13 +729,15 @@ const unsigned int Hiperface_DSL2_0[]= {
0x2400269f,
0x1f020202,
0x81521802,
0x79000033,
0x79000035,
0x81521802,
0x0908f3e2,
0x10727202,
0x91a45800,
0x0480d281,
0x06c093c1,
0x04c093c1,
0x5880d202,
0x0501c1c1,
0x10e1e1e2,
0xc91fe203,
0x1600e2e2,
@ -768,7 +770,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x813a188d,
0x24000019,
0x79000002,
0x2304d0d1,
0x2304d2d1,
0x10535300,
0x10333320,
0x10131340,
@ -931,7 +933,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x24003001,
0xd1066b0e,
0x2400010d,
0x230667d1,
0x230669d1,
0x68ab8d45,
0x13803b3b,
0x913d1880,
@ -944,7 +946,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x81531800,
0x7900003b,
0x2400020d,
0x230667d1,
0x230669d1,
0x688b8d38,
0x8137184b,
0x13803b3b,
@ -987,7 +989,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x1d09c4c4,
0x2400040d,
0x24003001,
0x230667d1,
0x230669d1,
0x15ff8d9c,
0x69005c34,
0x51009c33,
@ -1224,7 +1226,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x108787c7,
0x04c98087,
0x108080c9,
0x2304b7d1,
0x2304b9d1,
0x108b8b9d,
0x91aa1800,
0x1f018000,
@ -1244,7 +1246,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x108787c7,
0x04c98087,
0x108080c9,
0x2304b7d1,
0x2304b9d1,
0x91983880,
0x10eeeee1,
0x24000061,
@ -1333,7 +1335,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x81080580,
0x24001fc0,
0x810605c0,
0x24004300,
0x24004400,
0x810b1800,
0x81441800,
0x2eff8383,
@ -1367,7 +1369,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x9101185b,
0x51005b0e,
0x7900000d,
0x230624d1,
0x230626d1,
0x91dc388c,
0x240000e2,
0x91e21882,
@ -1375,7 +1377,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x100c0c2a,
0x106c6c4a,
0x102c2c6a,
0x230624d1,
0x230626d1,
0x0b01e2e2,
0x0501e2e2,
0x4f00e2ff,
@ -1498,7 +1500,7 @@ const unsigned int Hiperface_DSL2_0[]= {
0x0b077200,
0x12001313,
0x0901f2f2,
0x230630d1,
0x230632d1,
0x510e6506,
0x6f010df6,
0x10656546,
@ -1535,16 +1537,16 @@ const unsigned int Hiperface_DSL2_0[]= {
0xd703ffff,
0x24001b8d,
0x23016a9d,
0x2305f69d,
0x230630d1,
0x2305f89d,
0x230632d1,
0x6f010deb,
0x05012525,
0x4f0025f8,
0x24001025,
0x24001c8d,
0x23016a9d,
0x2305f69d,
0x230630d1,
0x2305f89d,
0x230632d1,
0x6f010dd8,
0x05012525,
0x4f0025fa,
@ -1711,4 +1713,4 @@ const unsigned int Hiperface_DSL2_0[]= {
0x91003c82,
0x1308e2e2,
0x81003c82,
0x2104f000 };
0x2104f200 };

View File

@ -164,7 +164,11 @@ transport_on_v_frame_not_first:
;check for LAST FAST POS and SAFE POS mismatch
lbco &REG_TMP0.b0, MASTER_REGS_CONST, LAST_FAST_POS0, SIZE_FAST_POS
sub REG_TMP1.w0, VERT_L.w2, REG_TMP0.w0
suc REG_TMP1.w2, VERT_H.w0, REG_TMP0.w2
sub REG_TMP1.w2, VERT_H.w0, REG_TMP0.w2
qble no_sub_carry, VERT_L.w2, REG_TMP0.w0
; if carry is needed, subtract 1 separately
sub REG_TMP1.w2, REG_TMP1.w2, 1
no_sub_carry:
mov REG_TMP2, REG_TMP1
;check if diff is neg,
qbbc transport_on_v_frame_diff_pos, REG_TMP2, 31