am243x/am64x: SDFM: Update sdk documentation

Fixes: PINDSW-7019

Signed-off-by: Achala Ram <a-ram@ti.com>

docs_src/docs/api_guide/components/current_sense/current_sense.md

@@ -15,26 +15,40 @@ ICSS %SDFM is a sigma delta interface for phase current measurement in high perf
  - Event generation(ARM interrupt for data read from DMEM, GPIO toggle for high and low thresholds)
  - Single level High and Low threshold comparator
  - Trigger based normal current sampling
+ - Continuous normal current sampling
  - Double update: Double normal current sampling per EPWM cycle
  - %SDFM Sync with EPWM
  - Fast detect
  - PWM Trip generation for overcurrent
  - Clock Phase Compensation
+ - Zero cross comparator
 
 ## Features Not Supported
-- Zero cross comparator
 - Multi-level threshold
 
-## System design considerations
+## System Design Considerations
+
 ### Over Sample Ratio
+
 -  OSR Below 16 at SD_CLK greater than 20MHz. The normal current task takes 300ns to 400ns to complete and its execution is based on CMP event and task manager. When we configure OSR below 16 for greater than 20 MHz SD clock, the NC will not be able to complete its processing until the next sample is ready, this will cause the NC samples to be inaccurate.
 
+### PWM TripZone (TZ) Block Inputs and Outputs
+ - Fixed mapping between the fast detect errors and PWM TZ blocks
+   - Axis 1 (Channel0 - Channel2) mapped with PWM0
+   - Axis 2 (Channel3 - Channel5) mapped with PWM1
+   - Axis 3 (Channel6 - Channel8) mapped with PWM2
+ - PWM1 and PWM2 TZ output pins are only valiable on am243x-lp in servo BP signal mode
+
+### SDFM Data Pin Conflicts on AM243x LaunchPad(LP)
+- In default signal mode, all 9 SD data pins are available on LP jumpers. But in servo BP signal mode the routing for 4 SD data pins (SD4_D, SD5_D, SD6_D and SD7_D) is changing. Out of the 4 pins, two pins are available on board jumpers (sd4_d and sd5_d) and two are not available (sd6_d and sd7_d9). For more details on pinmux with LP, please see <a href="https://www.ti.com/lit/ug/spruj12e/spruj12e.pdf" target="_blank">AM243x LaunchPad Development Kit User's Guide</a>
+
+\image html SDFM_PIN_CONFLICT.png "PIN routing for SD channels"
 
 ## ICSS SDFM Design
 \subpage SDFM_DESIGN explains the design in detail.
 
 ## Example
-\ref EXAMPLE_MOTORCONTROL_SDFM
+\ref EXAMPLES_MOTORCONTROL_SDFM
 
 ## API
 \ref SDFM_API_MODULE

docs_src/docs/api_guide/components/current_sense/sdfm_design.md

@@ -67,16 +67,22 @@ Following section describes the firmware implementation of Sigma Delta Decimatio
 \image html SDFM_FIRMWARE_FLOWCHART.png "Overall Block Diagram"
 
 - Firmware first clears the PRU registers and task manager.
+- Next if phase compensation is enabled, it measures phase delay
 - Then it waits for the ARM core to set %SDFM enable bit. After the enable bit is set, it sends an acknowledgement to ARM core.
 - After this, the firmware does initialization of PRU-ICSSG's %SDFM hardware interface, task manager and IEP0.
-- If threshold comparator is enabled, then a free run over current loop is setup, else it sets up an infinite waiting loop. In over current loop, the firmware reads sample data from the shadow copy register and does low and high theshold compersion with sample data, and depending on the configuration it toggles the GPIO pins.
+- If threshold comparator is enabled, then a free run over current loop is setup, else it sets up an infinite waiting loop. In over current loop, the firmware reads sample data from the shadow copy register and does low and high theshold compersion with sample data, and depending on the configuration it generates over current trip in PWM trip zone block. Also if zero cross detection is enabled, it detects zero cross.
-- Time triggered normal current task is configured to be triggered based on IEP CMP4 event. When the CMP4 event hits, the task manager sets the program counter to normal current task. In normal current task, firmware reads sample data from accumulator and it checks for fourth normal current sample (for SINC3 filtering). If the current normal current sample belongs to fourth normal current sample, then it stores the same in data memory DMEM as normal current row data and trigger interrupt.
+- Time triggered normal current task is configured to be triggered based on IEP CMP event. When the CMP event hits, the task manager sets the program counter to normal current task. In normal current task, firmware reads sample data from accumulator and it checks for fourth normal current sample (for SINC3 filtering). If the current normal current sample belongs to fourth normal current sample, then it stores the same in data memory DMEM as normal current row data and trigger interrupt.
 - At the end of normal current firmware task, execution flow comes into infinite waiting loop or over current loop.
 
-##### Normal Curent (NC)
-This section describes normal current implementation. Its implementation is trigger based. It starts execution when the trigger point is acquired (first time CMP4 event hits) and performs four continuous samplings to bring the accumulator and differntiator registers to stable state for the configured normal current OSR.
 
-Initially the CMP4 register is configured with the first sample trigger start time and then until the next third continuous normal current sample it is updated with the normal current OSR sampling time. At the end of the fourth normal current sample again, it is updated with the second sample start time if double update is enabled otherwise with the first sample trigger start time.
+##### Normal Curent (NC)
+
+This section describes normal current implementation. 
+
+There are two different variations of normal current.
+- Trigger based: It starts execution when the trigger point is acquired (first time CMP event hits) and performs four continuous samplings to bring the accumulator and differntiator registers to stable state for the configured normal current OSR. Initially the CMP register is configured with the first sample trigger start time and then until the next third continuous normal current sample it is updated with the normal current OSR sampling time. At the end of the fourth normal current sample again, it is updated with the second sample start time if double update is enabled otherwise with the first sample trigger start time.
+
+- Continuous sampling: It starts execution when the first time CMP event hits. Every time it updates CMP event register with the normal current OSR sampling time for next continuous sample, store sample values in DMEM and trigger R5 intrrupt. 
 
 \image html SDFM_NC_FLOW_CHART.png "Normal Current"
 
@@ -92,11 +98,22 @@ Normal current sampling is done twice in one EPWM cycle.
 \image html SDFM_Double_update.PNG "Double Update"
 
 ##### Over Current (OC)/Threshold Comparator 
-This section describes the over current implementation. It performs continuous sampling (free run) and when the sample value crosses the high or low threshold, the corresponding GPIO pin goes high.
+This section describes the over current implementation. It performs continuous sampling (free run) and when the sample value crosses the high or low threshold, the corresponding PWM trip status gets set and TZ_OUT pin goes high. It also stores high and low threshold status in DMEM for all channels, \ref SDFM_getHighThresholdStatus API returns high threshold status for specified SDFM channel number and \ref SDFM_getLowThresholdStatus API returns low threshold status for specified SDFM channel number.
 
 \image html SDFM_OC_Flow_Chart.png "Over current"
-\image html SDFM_GPIO_toggle.png "GPIOs behaviour for High and Low threshold"
+\image html SDFM_OC_ERROR_MAPPING_WITH_PWM_TZ.png "Mapping between Over current errors and PWM TZ blocks"
 
+###### Zero Cross Comparator 
+This section describes the zero cross implementation. It compares the current sample and the previous sample values with zero cross threshold value.
+
+There are two cases:
+
+ - Current sample value is greater than zero cross threshold value: If the latest previous sample value is less than the zc threshold value, it changes the direction of the corresponding GPIO pin from low to high otherwise keeps the GPIO in the same direction.
+ - Current sample value is less than zero cross threshold value: If the latest previous sample value is grather than the zc threshold value, it changes the direction of the corresponding GPIO pin from High to low otherwise keeps the GPIO in the same direction.
+
+\image html SDFM_Zero_cross_flow_chart.png "Zero cross"
+
+\image html SDFM_Zero_cross_GPIO_output.png "Zero cross GPIO behaviour"
 #### Sync with EPWM and trigger timing
 This section describes the EPWM to %SDFM synchronization and trigger timing for each EPWM cycle. At the end of the every EPWM cycle, the EPWM generates a sync out event that resets the IEP timer.
 The firmware initiates normal current sampling at the sample trigger point in each EPWM cycle. It takes four consecutive samples to bring the accumulator and differentiator registers to stable state. It takes the first sample at the trigger point and the next three samples, each after ONE_SAMPLE_TIME.
@@ -105,15 +122,19 @@ Here ONE_SAMPLE_TIME is: OSR*(1/SD_CLK)
 
 #### Fast Detect and Trip generation
 The Fast Detect block is used for fast over current detection, it comparatively measures the number of zeros and ones presented in a programmable sliding window of 4 to 32 bits. It starts the comparison after the first 32 sample clocks. Based on the configured zero max/min count limits, it compares zero counter with these limits. If zero counter crosses limit then it sends a error signal to respective PWM Trip zone block.
-PWM TZ block receives this error signal and generates a Trip on TZ_OUT pin.
+PWM TZ block receives this error signal and sets trip status bit to bring TZ_OUT pin output state to high.
+
+Note: To identify the sigma delta fast detect error trip cause, \ref SDFM_getFastDetectErrorStatus API can be used and to clear the PWM trip status, \ref SDFM_clearPwmTripStatus API can be used.
+
+\image html SDFM_FD_ERROR_MAPPING_WITH_PWM_TZ.png "Mapping between Fast detect errors and PWM TZ blocks"
 
 #### Data/Clock Phase Compensation 
 Following points describe the process for measurement of phase difference between clock and data
 - Set PRU IO mode to GPIO mode (default) for direct capture of input data and clock pins 
 - First wait for rising edge on the SD data pin, then check the nearest upcoming edge to the SD clock pin. If the nearest edge of clock pin is falling, then it measures the time between the rising edge of the data pin and the falling edge of the SD clock. Otherwise it measures time between the rising edge of both data and clock pins.
+- It measures delay 8 times and repeats the measurement until the get like 8 time the same or a max variation of 1 PRU cycle. 
 - Based on the clock polarity, phase delay is calculated. If clock polarity and upcoming nearest edge of clock pin for rising edge of data pin are same, then final phase delay will be half SD clock duty cycle time minus calculated time. Otherwise phase delay will be SD clock one cycle period time minus calculated time  
-
+\image html SDFM_Phase_delay_flowchart.png "Phase Compensation"
-
 #### AM64x/AM243x EVM Pin-Multiplexing
 <table>
 <tr>
@@ -122,35 +143,20 @@ Following points describe the process for measurement of phase difference betwee
 	<th>Function
 </tr>
 <tr>
-    <td>GPIO_HIGH_TH_CH0
+    <td>GPIO_ZC_TH_CH0
     <td>MCU_SPI0_D1/B6
 	<td>Ch0 High threshold output
 </tr>
 <tr>
-    <td>GPIO_LOW_TH_CH0
+    <td>GPIO_ZC_TH_CH1
-    <td>MCU_SPI1_D0/C7
-	<td>Ch0 low threshold output
-</tr>
-<tr>
-    <td>GPIO_HIGH_TH_CH1
     <td>MCU_SPI1_CS0/A7
 	<td>Ch1 High threshold output
 </tr>
 <tr>
-    <td>GPIO_LOW_TH_CH1
+    <td>GPIO_ZC_TH_CH2
-    <td>MCU_SPI1_CLK/D7
-	<td>Ch1 low threshold output
-</tr>
-<tr>
-    <td>GPIO_HIGH_TH_CH2
     <td>MCU_SPI1_D1/C8
 	<td>Ch2 High threshold output
 </tr>
-<tr>
-    <td>GPIO_LOW_TH_CH2
-    <td>MCU_SPI0_CLK/E6
-	<td>Ch2 Low threshold output
-</tr>
 <tr>
     <td>SD0_D
     <td>PIN_PRG0_PRU0_GPO1
@@ -192,34 +198,19 @@ Following points describe the process for measurement of phase difference betwee
 	<th>Function
 </tr>
 <tr>
-    <td>GPIO_HIGH_TH_CH0
+    <td>GPIO_ZC_TH_CH0
     <td>PRG1_PRU0_GPO18
-	<td>(J7.64)Ch0 High threshold output
+	<td>(J7.64)Ch0 Zero cross output 
 </tr>
 <tr>
-    <td>GPIO_LOW_TH_CH0
+    <td>GPIO_ZC_TH_CH1
-    <td>PRG0_PRU1_GPO11
-	<td>(J7.70)Ch0 low threshold output
-</tr>
-<tr>
-    <td>GPIO_HIGH_TH_CH1
-    <td>PRG1_PRU0_GPO17
-	<td>(J7.65)Ch1 High threshold output
-</tr>
-<tr>
-    <td>GPIO_LOW_TH_CH1
-    <td>PRG1_PRU0_GPO7
-	<td>(J7.66)Ch1 low threshold output
-</tr>
-<tr>
-    <td>GPIO_HIGH_TH_CH2
-    <td>PRG0_PRU1_GPO1
-	<td>(J7.67)Ch2 High threshold output
-</tr>
-<tr>
-    <td>GPIO_LOW_TH_CH2
     <td>PRG0_PRU1_GPO2
-	<td>(J7.68)Ch2 Low threshold output
+	<td>(J7.65)Ch1 Zero cross output
+</tr>
+<tr>
+    <td>GPIO_ZC_TH_CH2
+    <td>PRG0_PRU1_GPO1
+	<td>(J7.67)Ch2 Zero cross output
 </tr>
 <tr>
     <td>SD0_D
@@ -251,6 +242,16 @@ Following points describe the process for measurement of phase difference betwee
     <td>PIN_PRG0_PRU0_GPO19
 	<td>(J5.45)TZ output pin for Axis-1
 </tr>
+<tr>
+    <td>PWM1_TZ_OUT
+    <td>PIN_PRG0_PRU1_GPO19
+	<td>(J8.76)TZ output pin for Axis-2
+</tr>
+<tr>
+    <td>PWM2_TZ_OUT
+    <td>PIN_PRG0_PRU1_GPO8
+	<td>(J6.57)TZ output pin for Axis-3
+</tr>
 <tr>
     <td>PRG1_IEP0_EDC_SYNC_OUT0
     <td>PIN_PRG1_PRU0_GPO19

docs_src/docs/api_guide/components/position_sense/endat_design.md

@@ -88,8 +88,7 @@ Single core of PRU-ICSSG slice used in this configuration.
 \image html endat_module_integration.png "ARM, PRU, EnDat module Integration for for "Single Channel" or "Multi Channel with Encoders of Same Make" configuration"
 
 #### Implementation for Multi Channel with Encoders of Different Make
-Each of PRU, TX-PRU and RTU-PRU handle one channel in this configuration
+Each of PRU, TX-PRU and RTU-PRU handle one channel in this configuration. Load share mode is enabled in case of multi make encoders.
-Enbale load share mode in case of multi make encoders.
 
 \image html Endat_load_share_mode.png "PRU, EnDat module Integration for "Multi Channel with Encoders of Different Make" configuration"
 

docs_src/docs/api_guide/device/am243x/examples.cfg

@@ -2,7 +2,10 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/examples.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/hdsl_example.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/endat_example.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_example.md
-INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_example.md
+INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_examples.md
+INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_continuous_nc_examples.md
+INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_trigger_based_nc_example_with_phase_delay.md
+INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_trigger_based_nc_examples.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/bissc_example.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md
 INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md

docs_src/docs/api_guide/device/am243x/release_notes_09_00_00.md

@@ -404,7 +404,7 @@ earlier SDKs.
 <tr>
     <td> Current Sense %SDFM
     <td> \ref SDFM_setCompFilterOverSamplingRatio
-    <td> Changed type of osr parameter
+    <td> Changed type of OSR parameter
     <td> uint8_t to uint16_t 
 </tr>
 <tr>

docs_src/docs/api_guide/examples/endat_example.md

@@ -110,7 +110,7 @@ Following section describes the Example implementation of EnDat on ARM(R5F).
 
 ## Hardware Prerequisites
 
-Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional HW is required to run this demo
+Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
 - EnDAT encoder
 - <a href="http://www.ti.com/tool/TIDA-00179" target="_blank"> TIDA-00179 Universal Digital Interface to Absolute Position Encoders </a>
 - TIDEP-01015 3 Axis board
@@ -223,9 +223,9 @@ Shown below is a sample output when the application is run:
 <table>
     <tr>
         <th style="width:4%">S.No</th>
-        <th>Test detail
+        <th>Test Details
         <th>Steps
-        <th>Pass/fail crieteria
+        <th>Pass/Fail Criteria
     </tr>
     <tr>
         <td style="text-align: center">1.</td>

docs_src/docs/api_guide/examples/examples.md

@@ -7,7 +7,7 @@ This page lists all the examples and demos supported in this SDK.
     -# \subpage EXAMPLE_MOTORCONTROL_HDSL
     -# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA
 - Current Sense
-    -# \subpage EXAMPLE_MOTORCONTROL_SDFM
+    -# \subpage EXAMPLES_MOTORCONTROL_SDFM
 - PRUICSS PWM
     -# \subpage EXAMPLE_PRUICSS_PWM_DUTY_CYCLE
 \endcond
@@ -19,7 +19,10 @@ This page lists all the examples and demos supported in this SDK.
     -# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA
     -# \subpage EXAMPLE_MOTORCONTROL_BISSC
 - Current Sense
-    -# \subpage EXAMPLE_MOTORCONTROL_SDFM
+    -# \subpage EXAMPLES_MOTORCONTROL_SDFM
+        -# \ref BASIC_SDFM_EXAMPLES
+        -# \ref BASIC_SDFM_EXAMPLES_WITH_CONTINUOUS_NC
+        -# \ref BASIC_SDFM_EXAMPLE_WITH_PHASE_DELAY
 - RTLibs
     -# \subpage EXAMPLES_DCL_PI
     -# \subpage EXAMPLES_DCL_DF22

docs_src/docs/api_guide/examples/hdsl_example.md

@@ -82,7 +82,7 @@ This example also allows the capability to save the HDSL register data into memo
 
 ## Hardware Prerequisites
 
-Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional HW is required to run this demo
+Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
 - HDSL encoder
 - Below are two options to connect encoder to AM64x/AM243x EVM.
     - **Option 1**

docs_src/docs/api_guide/examples/sdfm_continuous_nc_examples.md

@@ -0,0 +1,229 @@
+# %SDFM Examples with Continuous Normal Current Sampling{#BASIC_SDFM_EXAMPLES_WITH_CONTINUOUS_NC}
+
+[TOC]
+
+This example does continuous normal current sampling. Normal current OSR can be configured by the user. There are two different examples based on number of %SDFM channels.
+
+# Three Channels with Continuous Mode
+
+Only one core - PRU is used for this example.
+
+The example does the below
+
+ - Set %SDFM channels : Channel 0 - Channel 2
+ - Enable continuous mode for normal current
+ - Configure Normal current OSR
+
+
+# Nine Channels with Continuous Mode
+
+Load share mode of PRU-ICSSG is enabled for this example and three cores - RTU-PRU, PRU and TX-PRU are used for this example.
+
+The example does the below
+
+ - Enable load share mode
+ - Set %SDFM channels : Channel 0 - Channel 8
+ - Enable continuous mode for normal current
+ - Configure Normal current OSR
+
+ # Important files and directory structure
+
+<table>
+<tr>
+    <th>Folder/Files
+    <th>Description
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode</td>
+    <td> Application specific sources for ICSS %SDFM for continuous normal current sampling for nine channels </td>
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode</td>
+    <td> Application specific sources for ICSS %SDFM for continuous normal current sampling for three channels </td>
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense</td>
+    <td> Common source for ICSS %SDFM applications </td>
+</tr>
+<tr><td colspan="2" bgcolor=#F0F0F0> ${SDK_INSTALL_PATH}/source/current_sense/sdfm</td></tr>
+<tr>
+    <td>firmware/</td>
+    <td>Folder containing ICSS %SDFM firmware sources</td>
+</tr>
+<tr>
+    <td>driver/</td>
+    <td>ICSS %SDFM driver source</td>
+</tr>
+<tr>
+    <td>include/</td>
+    <td>Folder containing ICSS %SDFM structures and APIs declarations</td>
+</tr>
+</table>
+
+# Supported Combinations
+
+\cond SOC_AM243X
+
+ Parameter       | Value
+ ----------------|-----------
+ CPU + OS        | r5fss0-0 freertos
+ ICSSG           | ICSSG0
+ PRU             | PRU0
+ Toolchain       | ti-arm-clang
+ Board           | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
+ Examples folder | examples/current_sense
+
+\endcond
+
+# Steps to Run the Example
+
+## Hardware Prerequisites
+Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
+- TIDEP-01015 3 Axis board
+- Interface card connecting EVM and TIDEP-01015 3 Axis board
+- Signal generator
+
+### Hardware Setup
+\image html SDFM_HwSetup_image.PNG  "Hardware Setup SDFM"
+\image html SDFM_EVM_HW_setup.png  "SDFM: EVM and 3axis board setup view"
+\cond SOC_AM243X
+### Hardware Prerequisities for LP
+- AMC1035EVM
+- AM243x-LP board
+- Signal generator
+
+#### LP Hardware Setup
+\image html SDFM_LpHwSetup_image.png  "LP Hardware setup"
+\image html SDFM_LpHwSetup.png  "SDFM: LP setup view"
+\endcond
+## Build, load and run
+
+- **When using CCS projects to build**, import the CCS project and build it using the CCS project menu (see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_PROJECTS_PAGE.html" target="_blank"> Using SDK with CCS Projects </a>).
+- **When using makefiles to build**, note the required combination and build using
+  make command (see <a href="@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html" target="_blank"> Using SDK with Makefiles </a>)
+- Launch a CCS debug session and run the executable, see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html" target="_blank">  CCS Launch, Load and Run </a>
+- Refer to UART terminal for user interface menu options.
+
+### Test Case Description
+<table>
+<tr>
+        <th>Test Details
+        <th>Steps
+        <th>Pass/Fail Criteria
+</tr>
+<tr>
+        <td>1. Normal current sample data</td>
+        <td>1. Run example on supported board</td>
+        <td>The drawn graph and raw data should look like the attached image</td>
+</tr>
+<tr>
+        <td></td>
+        <td>2. Draw the graph of sdfm_ch0_samples, sdfm_ch1_samples and sdfm_ch2_samples arrays</td>
+        <td>\image html SDFM_Continuous_mode_sample.PNG "NC sample data"</td>
+ </tr>
+
+<tr>
+        <td>2. To check NC Samples with Different NC OSR Values</td>
+        <td>1. Set NC OSR values between 16 to 255 </td>
+        <td>Raw data should have different resolution for different OSR values </td>
+</tr>
+<tr>
+        <td></td>
+        <td>2. Build and run example</td>
+        <td></td>
+</tr>
+<tr>
+        <td></td>
+        <td>3. Observe resolution of raw data</td>
+        <td></td>
+</tr>
+<tr>
+        <td>3. To check NC samples with different sdfm clock values</td>
+        <td>1. Set NC OSR to 64</td>
+        <td> Raw data should have different resolution for different sdfm clock values  </td>
+</tr>
+<tr>
+        <td></td>
+        <td>2. Set ecap_divider variable in sdfm.c file for different sd clock generation</td>
+        <td></td>
+ </tr>
+ <tr>
+        <td></td>
+        <td>3. Set Sigma delta clock equal to ecap generated clock</td>
+        <td></td>
+ </tr>
+<tr>
+        <td></td>
+        <td>4. Build and run example</td>
+        <td></td>
+</tr>
+<tr>
+        <td></td>
+        <td>5. Observe resolution of raw data</td>
+        <td></td>
+</tr>
+<tr>
+        <td>4. To check Fast detect</td>
+        <td>1. Set NC OSR to 64</td>
+        <td> Trip must be triggered for the respective pwm trip zone block </td>
+</tr>
+<tr>
+        <td></td>
+        <td>2. Enable Fast detect</td>
+        <td></td>
+ </tr>
+<tr>
+        <td></td>
+        <td>3. Set Fast Detect fields with these values { window size = 4, Zero max = 18, Zero min = 2}</td>
+        <td>Zero max/min Threshold hit bits must be constantly unset and set </td>
+ </tr>
+
+<tr>
+        <td></td>
+        <td>4. Build and run example</td>
+        <td>One max/min threshold hit bits must be unset</td>
+</tr>
+<tr>
+        <td></td>
+        <td>5. 1) Observe TZ_OUT PIN.
+               2) Check zero/one count max & zero/one count min threshold hit bits in memory map</td>
+        <td></td>
+</tr>
+\cond SOC_AM243X
+<tr>
+        <td>5.Testing with sdfm clock from EPWM </td>
+        <td>1. Make hardware set up like attached image </td>
+        <td>All test cases results should match with ECAP test case results</td>
+ </tr>
+<tr>
+        <td></td>
+        <td>2. \image html SDFM_EPWM1_HW_Setup.png "SDFM: Hw set for clock from EPWM"</td>
+        <td></td>
+ </tr>
+ <tr>
+        <td></td>
+        <td>3. Enable "APP_EPWM1_ENABLE" macro in app_sdfm.c file</td>
+        <td></td>
+ </tr>
+ <tr>
+        <td></td>
+        <td>4. Set EPWM1 out put frequency to 12.5MHz or 5MHz in app_sdfm.c file</td>
+        <td></td>
+ </tr>
+ <tr>
+        <td></td>
+        <td>5. Set Sigma delta clock equal to EPWM1 output frequency</td>
+        <td></td>
+ </tr>
+ <tr>
+        <td></td>
+        <td>6. Build and run example</td>
+        <td></td>
+ </tr>
+ <tr>
+        <td></td>
+        <td>7. Test all tese cases from 1 to 5 with EPWM clock</td>
+        <td></td>
+ </tr>
+ \endcond
+</table>

docs_src/docs/api_guide/examples/sdfm_examples.md

@@ -0,0 +1,120 @@
+# ICSS %SDFM Examples {#EXAMPLES_MOTORCONTROL_SDFM}
+
+[TOC]
+
+This page lists all the examples of ICSSG %SDFM availble in this SDK. Following sections describe the features available in each of the examples.
+
+The ICSS %SDFM driver provides a well defined set of APIs to expose sigma delta interface.
+
+The ICSS %SDFM examples invoke these APIs to
+- Set %SDFM channels
+- Set ACC source, NC OSR, OC OSR, Clock source & Clock inversion
+- Enable & disable threshold comparators
+- Set high and low threshold values
+- Enable Zero Cross & set Zero cross threshold value
+- configure normal current sample trigger time (time for read sample)
+- Enable & disable double update
+- Inform firmware to enable %SDFM mode
+- Configure and fast detect block
+- Enable PRU load share mode
+- Enable Phase Compensation
+
+Once these steps are executed
+- ICSS %SDFM example waits for a interrupt (trigger by %SDFM firmware) to read sample data
+- when interrupt occurs, example reads sample data from DMEM and again comes back to waiting loop
+
+# ICSS SDFM Examples Implementation
+Following section describes the flow of the examples.
+
+\image html SDFM_EXAMPLE_FLOWCHART.png "ICSS SDFM Examples"
+
+# Important files and directory structure
+
+<table>
+<tr>
+    <th>Folder/Files
+    <th>Description
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode</td>
+    <td> Application specific sources for ICSS %SDFM for continuous normal current sampling for nine channels </td>
+</tr>
+<tr>
+    <td> ${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_nine_channel_load_share_mode</td>
+    <td> Application specific sources for ICSS %SDFM for trigger based normal current sampling for nine channels </td>
+</tr>
+<tr>
+    <td> ${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_three_channel_single_pru_mode</td>
+    <td> Application specific sources for ICSS %SDFM for trigger based normal current sampling for three channels </td>
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode</td>
+    <td> Application specific sources for ICSS %SDFM for continuous normal current sampling for three channels </td>
+</tr>
+
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation</td>
+    <td> Application specific sources for ICSS %SDFM with phase compensation </td>
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense</td>
+    <td> Common source for ICSS %SDFM applications </td>
+</tr>
+<tr><td colspan="2" bgcolor=#F0F0F0> ${SDK_INSTALL_PATH}/source/current_sense/sdfm</td></tr>
+<tr>
+    <td>firmware/</td>
+    <td>Folder containing ICSS %SDFM firmware sources</td>
+</tr>
+<tr>
+    <td>driver/</td>
+    <td>ICSS %SDFM driver source</td>
+</tr>
+<tr>
+    <td>include/</td>
+    <td>Folder containing ICSS %SDFM structures and APIs declarations</td>
+</tr>
+</table>
+
+# Supported Combinations {#EXAMPLES_MOTORCONTROL_SDFM_COMBOS}
+
+\cond SOC_AM243X
+
+ Parameter       | Value
+ ----------------|-----------
+ CPU + OS        | r5fss0-0 freertos
+ ICSSG           | ICSSG0
+ PRU             | PRU0
+ Toolchain       | ti-arm-clang
+ Board           | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
+ Examples folder | examples/current_sense
+
+\endcond
+
+# ICSS SDFM Examples Description
+
+Following are different examples for ICSS %SDFM:
+
+<table>
+<tr>
+        <th>Example
+        <th>Enabled Features
+        <th>Tested/Supported Features
+</tr>
+<tr>
+        <td>\subpage BASIC_SDFM_EXAMPLES </td>
+        <td>Trigger based Normal current, Over current detection</td>
+        <td>Zero cross detection, Fast detect, Double Update</td>
+ </tr>
+ <tr>
+        <td>\subpage BASIC_SDFM_EXAMPLES_WITH_CONTINUOUS_NC</td>
+        <td>Continuous normal current sampling</td>
+        <td>Fast detect</td>
+ </tr>
+ <tr>
+        <td>\subpage BASIC_SDFM_EXAMPLE_WITH_PHASE_DELAY</td>
+        <td>Trigger based Normal current, Phase compensation, Over current detection </td>
+        <td>Fast detect, Double Update, Zero cross detection</td>
+
+ </tr>
+</table>
+

docs_src/docs/api_guide/examples/sdfm_trigger_based_nc_example_with_phase_delay.md

@@ -0,0 +1,129 @@
+# %SDFM Example With Phase Compensation {#BASIC_SDFM_EXAMPLE_WITH_PHASE_DELAY}
+
+[TOC]
+
+# ICSS SDFM three channel with phase compensation
+
+This example measures phase compensation for %SDFM channel 0 in PRU GPIO mode
+during initialization. Normal current OSR, Over current OSR and Normal current trigger time can be configured by the user
+
+Only one core - PRU is used for this example.
+
+The example does the below:
+- Configure ICSSG1 IEP0 for generating clock for %SDFM
+- Enable Phase Compensation Measurement
+- Configure SYNC1 Delay register based on the easured phase delay
+- Set %SDFM channels: Channel 0 - Channel 2
+- Configure normal current sample trigger time (time for read sample) and OSR
+
+# Important files and directory structure
+
+<table>
+<tr>
+    <th>Folder/Files
+    <th>Description
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation</td>
+    <td> Application specific sources for ICSS %SDFM with phase compensation </td>
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense</td>
+    <td> Common source for ICSS %SDFM applications </td>
+</tr>
+<tr><td colspan="2" bgcolor=#F0F0F0> ${SDK_INSTALL_PATH}/source/current_sense/sdfm</td></tr>
+<tr>
+    <td>firmware/</td>
+    <td>Folder containing ICSS %SDFM firmware sources</td>
+</tr>
+<tr>
+    <td>driver/</td>
+    <td>ICSS %SDFM driver source</td>
+</tr>
+<tr>
+    <td>include/</td>
+    <td>Folder containing ICSS %SDFM structures and APIs declarations</td>
+</tr>
+</table>
+
+# Supported Combinations
+
+\cond SOC_AM243X
+
+ Parameter       | Value
+ ----------------|-----------
+ CPU + OS        | r5fss0-0 freertos
+ ICSSG           | ICSSG0
+ PRU             | PRU0
+ Toolchain       | ti-arm-clang
+ Board           | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
+ Examples folder | examples/current_sense
+
+\endcond
+
+# Steps to Run the Example
+
+## Hardware Prerequisites
+Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
+- TMDS64DC01EVM IO Link/Breakout Board
+- AMC1035EVM
+- AM243x-EVM
+- Signal generator
+
+
+### Hardware Setup
+\imageStyle{SDFM_EVMHw_SETUP_image.jpeg,width:40%}
+\image html SDFM_EVMHw_SETUP_image.jpeg  "Hardware Setup SDFM"
+\image html SDFM_EVM_SETUP_FOR_PHASE_DELAY.png  "SDFM: EVM and IO breakout board setup view"
+\cond SOC_AM243X
+### Hardware Prerequisities for LP
+- AMC1035EVM
+- AM243x-LP board
+- Signal generator
+
+#### LP Hardware Setup
+\imageStyle{SDFM_LPHw_SETUP_FOR_PHASE_DELAY.jpeg,width:40%}
+\image html SDFM_LPHw_SETUP_FOR_PHASE_DELAY.jpeg  "LP Hardware setup"
+\image html SDFM_LP_HWSETUP_FOR_PHASE_DELAY.png  "SDFM: LP setup view"
+\endcond
+## Build, load and run
+
+- **When using CCS projects to build**, import the CCS project and build it using the CCS project menu (see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_PROJECTS_PAGE.html" target="_blank"> Using SDK with CCS Projects </a>).
+- **When using makefiles to build**, note the required combination and build using
+  make command (see <a href="@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html" target="_blank"> Using SDK with Makefiles </a>)
+- Launch a CCS debug session and run the executable, see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html" target="_blank">  CCS Launch, Load and Run </a>
+- Refer to UART terminal for user interface menu options.
+
+### Test Case Description
+<table>
+<tr>
+        <th>Test Details
+        <th>Steps
+        <th>Pass/Fail Criteria
+</tr>
+<tr>
+        <td>1. To check Phase Compensation</td>
+        <td>1. Run the example on supported board </td>
+        <td></td>
+</tr>
+<tr>
+        <td></td>
+        <td>2. probe ch0 SD0_D pin and SD8_CLK pin </td>
+        <td></td>
+</tr>
+<tr>
+        <td></td>
+        <td>3. Build and run example</td>
+        <td></td>
+</tr>
+<tr>
+        <td></td>
+        <td>4. Take time stamp of any rising edge of SD0_D pin and upcoming active SD8_CLK edge</td>
+        <td></td>
+</tr>
+<tr>
+        <td></td>
+        <td>5. Compare this time with measured delay(stored in DMEM at offset 0x18)</td>
+        <td>Both value should be same or have a maxumum variation of 1 PRU cycle</td>
+</tr>
+</table>

docs_src/docs/api_guide/examples/sdfm_trigger_based_nc_examples.md

@@ -1,92 +1,80 @@
-#  %SDFM {#EXAMPLE_MOTORCONTROL_SDFM}
+#  Basic ICSS %SDFM Examples {#BASIC_SDFM_EXAMPLES}
 
 [TOC]
 
+This example does trigger based normal current sampling. Normal current OSR, Over current OSR and Normal current trigger time can be configured by the user. There are two different examples based on number of %SDFM channels.
+
+# Three Channels
+
+Only one core - PRU is used for this example.
+
+The example does the below:
+- Set %SDFM channels: Channel 0 - Channel 2
+- Configure normal current sample trigger time (time for read sample) and OSR
+
+# Nine Channels
+
+Load share mode of PRU-ICSSG is enabled for this example and three cores - RTU-PRU, PRU and TX-PRU are used for this example.
+
+The example does the below
+ - Enable load share mode
+ - Set %SDFM channels: Channel 0 - Channel 8
+ - Configure normal current sample trigger time (time for read sample) and OSR
 
 
-The ICSS %SDFM driver provides a well defined set of APIs to expose sigma delta interface.
+# Important files and directory structure
-
-The ICSS %SDFM example invokes these APIs to
-- Set %SDFM channels
-- Set ACC source, NC OSR, OC OSR, Clock source & Clock inversion
-- Enable & disable threshold comparators
-- Set high and low threshold values
-- configure normal current sample trigger time (time for read sample)
-- Enable & disable double update
-- Inform firmware to enable %SDFM mode
-- Configure GPIO pins for high and low threshold
-- Configure fast detect block
-
-
-
-Once these steps are executed
-- ICSS %SDFM example waits for a interrupt (trigger by %SDFM firmware) to read sample data
-- when interrupt occurs, example reads sample data from DMEM and again comes back to waiting loop
-
-### ICSS SDFM Example Implementation
-Following section describes the Example implementation of ICSS %SDFM on ARM(R5F).
-\image html SDFM_EXAMPLE_FLOWCHART.png "ICSS SDFM Example"
-
-## Important files and directory structure
 
 <table>
 <tr>
     <th>Folder/Files
     <th>Description
 </tr>
-<tr><td colspan="2" bgcolor=#F0F0F0> ${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm</td></tr>
 <tr>
-    <td>app_sdfm.c & sdfm.c</td>
+    <td> ${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_nine_channel_load_share_mode</td>
-    <td>ICSS %SDFM application</td>
+    <td> Application specific sources for ICSS %SDFM for trigger based normal current sampling for nine channels </td>
+</tr>
+<tr>
+    <td> ${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_three_channel_single_pru_mode</td>
+    <td> Application specific sources for ICSS %SDFM for trigger based normal current sampling for three channels </td>
+</tr>
+<tr>
+    <td>${SDK_INSTALL_PATH}/examples/current_sense</td>
+    <td> Common source for ICSS %SDFM applications </td>
 </tr>
 <tr><td colspan="2" bgcolor=#F0F0F0> ${SDK_INSTALL_PATH}/source/current_sense/sdfm</td></tr>
 <tr>
     <td>firmware/</td>
-    <td>Folder containing %SDFM firmware sources</td>
+    <td>Folder containing ICSS %SDFM firmware sources</td>
 </tr>
 <tr>
     <td>driver/</td>
-    <td>ICSS %SDFM driver</td>
+    <td>ICSS %SDFM driver source</td>
 </tr>
 <tr>
     <td>include/</td>
-    <td>Folder containing ICSS %SDFM structures & APIs sources</td>
+    <td>Folder containing ICSS %SDFM structures and APIs declarations</td>
 </tr>
 </table>
 
-
+# Supported Combinations
-# Supported Combinations {#EXAMPLES_MOTORCONTROL_SDFM_COMBOS}
-
-\cond SOC_AM64X
-
- Parameter      | Value
- ---------------|-----------
- CPU + OS       | r5fss0-0 freertos
- ICSSG          | ICSSG0
- PRU            | PRU0
- Toolchain      | ti-arm-clang
- Board          | @VAR_BOARD_NAME_LOWER
- Example folder | examples/current_sense/icss_sdfm
-
-\endcond
 
 \cond SOC_AM243X
 
- Parameter      | Value
+ Parameter       | Value
- ---------------|-----------
+ ----------------|-----------
- CPU + OS       | r5fss0-0 freertos
+ CPU + OS        | r5fss0-0 freertos
- ICSSG          | ICSSG0
+ ICSSG           | ICSSG0
- PRU            | PRU0
+ PRU             | PRU0
- Toolchain      | ti-arm-clang
+ Toolchain       | ti-arm-clang
- Board          | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
+ Board           | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
- Example folder | examples/current_sense/icss_sdfm
+ Examples folder | examples/current_sense
 
 \endcond
 
 # Steps to Run the Example
 
 ## Hardware Prerequisites
-Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional HW is required to run this demo
+Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_SETUP_PAGE.html" target="_blank"> EVM Setup </a>, below additional hardware is required to run this demo
 - TIDEP-01015 3 Axis board
 - Interface card connecting EVM and TIDEP-01015 3 Axis board
 - Signal generator
@@ -101,7 +89,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 - AM243x-LP board
 - Signal generator
 
-#### LP Hardware set up
+#### LP Hardware Setup
 \image html SDFM_LpHwSetup_image.png  "LP Hardware setup"
 \image html SDFM_LpHwSetup.png  "SDFM: LP setup view"
 \endcond
@@ -113,19 +101,17 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 - Launch a CCS debug session and run the executable, see <a href="@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html" target="_blank">  CCS Launch, Load and Run </a>
 - Refer to UART terminal for user interface menu options.
 
-
-
 ### Test Case Description
 <table>
 <tr>
-        <th>Test detail
+        <th>Test Details
         <th>Steps
-        <th>Pass/fail crieteria
+        <th>Pass/Fail Criteria
 </tr>
 <tr>
         <td>1. Normal current sample data</td>
-        <td>1. Run icss sdfm example on am64x/am243x board</td>
+        <td>1. Run example on supported board</td>
-        <td>he drawn graph and raw data should look like the attached image</td>
+        <td>The drawn graph and raw data should look like the attached image</td>
 </tr>
 <tr>
         <td></td>
@@ -140,7 +126,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 </tr>
 <tr>
         <td></td>
-        <td>2. Set single update trigger time to half of epwm cycle time </td>
+        <td>2. Set single update trigger time to half of EPWM cycle time </td>
         <td></td>
  </tr>
  <tr>
@@ -150,7 +136,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 </tr>
 <tr>
         <td></td>
-        <td>3. Build and run icss sdfm example </td>
+        <td>3. Build and run example </td>
         <td></td>
 </tr>
 <tr>
@@ -162,7 +148,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 <tr>
         <td>3. To check Raw data for Double Update</td>
         <td>1. Set NC OSR to 64</td>
-        <td>drawn Graphs and raw data should look like attached image</td>
+        <td>The drawn graphs and raw data should look like attached image</td>
 </tr>
 <tr>
         <td></td>
@@ -171,17 +157,17 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 </tr>
 <tr>
         <td></td>
-        <td>3. Set single update trigger time to 1/4 of epwm cycle time</td>
+        <td>3. Set single update trigger time to 1/4 of EPWM cycle time</td>
         <td></td>
  </tr>
 <tr>
         <td></td>
-        <td>4. Set double update trigger time to 3/4 of epwm cycle time</td>
+        <td>4. Set double update trigger time to 3/4 of EPWM cycle time</td>
         <td></td>
  </tr>
  <tr>
         <td></td>
-        <td>5. Build and run icss sdfm example</td>
+        <td>5. Build and run example</td>
         <td></td>
  </tr>
 <tr>
@@ -198,27 +184,27 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 <tr>
         <td>4. To check Threshold comparator and Over current</td>
         <td>1. Set High Threshold to 3500 and low threshold to 2500</td>
-        <td>Logic analyzer capture for High & Low Thresholds  </td>
+        <td> Trip status bit must be set for the respective pwm trip zone block and TZ_OUT pin must be high</td>
 </tr>
 <tr>
         <td></td>
-        <td>2. Set Over current OSR to 32</td>
+        <td>2. Set Over current OSR to 16</td>
-        <td>\image html SDFM_threshold_comparator_salea_capture.png  "Logic analyzer Capture"</td>
+        <td>High Low Threshold status bits must be constantly unset and set</td>
 </tr>
 <tr>
         <td></td>
-        <td>3. Probe Ch0 high, low threshold GPIO pins & input signal </td>
+        <td>3. Probe PWMm_TZ_OUT pin </td>
         <td></td>
 </tr>
 <tr>
         <td></td>
-        <td>4. Build and run icss sdfm example</td>
+        <td>4. Build and run example</td>
         <td></td>
  </tr>
 <tr>
         <td></td>
         <td>5. Capture signal in Logic analyzer</td>
-        <td></td>
+        <td> </td>
  </tr>
 <tr>
         <td>5. To check NC Samples with Different NC OSR Values</td>
@@ -227,7 +213,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 </tr>
 <tr>
         <td></td>
-        <td>2. Build and run icss sdfm example</td>
+        <td>2. Build and run example</td>
         <td></td>
 </tr>
 <tr>
@@ -263,7 +249,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
 <tr>
         <td>7. To check Fast detect</td>
         <td>1. Set NC OSR to 64</td>
-        <td> Trip must be triggered for the respective  pwm trip zone block </td>
+        <td> Trip must be triggered for the respective pwm trip zone block </td>
 </tr>
 <tr>
         <td></td>
@@ -287,9 +273,39 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
                2) Check zero/one count max & zero/one count min threshold hit bits in memory map</td>
         <td></td>
 </tr>
+<tr>
+        <td>8. To check Zero Cross</td>
+        <td>1. Set OC OSR to 16</td>
+        <td> Logic analyzer capture should match with this capture </td>
+</tr>
+<tr>
+        <td></td>
+        <td>2. Enable Zero cross detection</td>
+        <td></td>
+ </tr>
+<tr>
+        <td></td>
+        <td>3. Set zero cross threshold vales to 1700 {value should be between max sampled value and min sampled value for 16 OSR}</td>
+        <td>\image html SDFM_Zero_cross_GPIO_output.png "Zero cross GPIO behaviour" </td>
+ </tr>
+<tr>
+        <td></td>
+        <td>4. probe ch0 zero cross GPIO pins and input SD analog signal</td>
+        <td></td>
+</tr>
+<tr>
+        <td></td>
+        <td>5. Build and run example</td>
+        <td></td>
+</tr>
+<tr>
+        <td></td>
+        <td>6. Capture signals in logic analyzer</td>
+        <td></td>
+</tr>
 \cond SOC_AM243X
 <tr>
-        <td>8.Testing with sdfm clock from EPWM </td>
+        <td>9.Testing with sdfm clock from EPWM </td>
         <td>1. Make hardware set up like attached image </td>
         <td>All test cases results should match with ECAP test case results</td>
  </tr>
@@ -315,7 +331,7 @@ Other than the basic EVM setup mentioned in <a href="@VAR_MCU_SDK_DOCS_PATH/EVM_
  </tr>
  <tr>
         <td></td>
-        <td>6. Build and run icss sdfm example</td>
+        <td>6. Build and run example</td>
         <td></td>
  </tr>
  <tr>

examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/app_sdfm.c

@@ -159,7 +159,7 @@ SdfmPrms gTestSdfmPrms = {
     {0,0}},
     15,   /*Over current osr: The effect count is OSR + 1*/
     128,   /*Normal current osr */
-    1,   /*comparator enable*/
+    0,   /*comparator enable*/
     (uint32_t)&gSdfm_sampleOutput, /*Output samples base address*/
     0,    /*Fast Detect enable */
     {{4, 18, 2},

source/current_sense/sdfm/include/sdfm_api.h

@@ -377,12 +377,12 @@ void SDFM_measureClockPhaseDelay(sdfm_handle h_sdfm, uint16_t clEdg);
 float SDFM_getClockPhaseDelay(sdfm_handle h_sdfm);
 /**
  *
- *  \brief  This API returns high threshold Status for specified SDFM channel number
+ *  \brief  This API returns Low threshold Status for specified SDFM channel number
  *
  *  \param[in]  h_sdfm          SDFM handle
  *  \param[in]  chNum           SDFM channel number : Channel0-Channel8
  *
- *  \retval     Status of Over current error for High threshold
+ *  \retval     Status of Over current error for Low threshold
  */
 uint8_t SDFM_getLowThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum);
 
@@ -392,7 +392,7 @@ uint8_t SDFM_getLowThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum);
  *  \param[in]  h_sdfm          SDFM handle
  *  \param[in]  chNum           SDFM channel number : Channel0-Channel8
  *
- *  \retval     Status of over current error for Low Threshold
+ *  \retval     Status of over current error for High Threshold
  */
 uint8_t SDFM_getHighThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum);