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am243x/am64x: hdsl: Load only required PRU firmware

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- Firmware for RTU and PRU cores are always being loaded
- This leads to unnecessary protocol resets in beginning, because of
  global PRU-ICSS peripheral reinitialization in both cores

Fixes: PINDSW-7126

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
This commit is contained in:
Dhaval Khandla 2023-12-18 11:21:56 +05:30
parent 77e4e34080
commit 295f98c971
1 changed files with 19 additions and 2 deletions
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21
examples/position_sense/hdsl_diagnostic/hdsl_diagnostic.c
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@ -776,29 +776,46 @@ void hdsl_pruss_load_run_fw_300m(HDSL_Handle hdslHandle)
if(HDSL_get_sync_ctrl(hdslHandle) == 0) if(HDSL_get_sync_ctrl(hdslHandle) == 0)
{ {
/*free run*/ /*free run*/
#if (CONFIG_HDSL0_CHANNEL0 == 1)
PRUICSS_writeMemory(gPruIcss0Handle, PRUICSS_IRAM_RTU_PRU(1), PRUICSS_writeMemory(gPruIcss0Handle, PRUICSS_IRAM_RTU_PRU(1),
0, (uint32_t *) Hiperface_DSL2_0_RTU_0, 0, (uint32_t *) Hiperface_DSL2_0_RTU_0,
sizeof(Hiperface_DSL2_0_RTU_0)); sizeof(Hiperface_DSL2_0_RTU_0));
#endif
#if (CONFIG_HDSL0_CHANNEL1 == 1)
PRUICSS_writeMemory(gPruIcss0Handle, PRUICSS_IRAM_PRU(1), PRUICSS_writeMemory(gPruIcss0Handle, PRUICSS_IRAM_PRU(1),
0, (uint32_t *) Hiperface_DSL2_0_PRU_0, 0, (uint32_t *) Hiperface_DSL2_0_PRU_0,
sizeof(Hiperface_DSL2_0_PRU_0)); sizeof(Hiperface_DSL2_0_PRU_0));
#endif
} }
else else
{ {
/*Sync mode*/ /*Sync mode*/
#if (CONFIG_HDSL0_CHANNEL0 == 1)
PRUICSS_writeMemory(gPruIcss0Handle, PRUICSS_IRAM_RTU_PRU(1), PRUICSS_writeMemory(gPruIcss0Handle, PRUICSS_IRAM_RTU_PRU(1),
0, (uint32_t *) Hiperface_DSL_SYNC2_0_RTU_0, 0, (uint32_t *) Hiperface_DSL_SYNC2_0_RTU_0,
sizeof(Hiperface_DSL_SYNC2_0_RTU_0)); sizeof(Hiperface_DSL_SYNC2_0_RTU_0));
#endif
#if (CONFIG_HDSL0_CHANNEL1 == 1)
PRUICSS_writeMemory(gPruIcss0Handle, PRUICSS_IRAM_PRU(1), PRUICSS_writeMemory(gPruIcss0Handle, PRUICSS_IRAM_PRU(1),
0, (uint32_t *) Hiperface_DSL_SYNC2_0_PRU_0, 0, (uint32_t *) Hiperface_DSL_SYNC2_0_PRU_0,
sizeof(Hiperface_DSL_SYNC2_0_PRU_0)); sizeof(Hiperface_DSL_SYNC2_0_PRU_0));
#endif
} }
PRUICSS_resetCore(gPruIcss0Handle, PRUICSS_RTU_PRU1);
PRUICSS_resetCore(gPruIcss0Handle, PRUICSS_PRU1);
/*Run firmware*/ /*Run firmware*/
#if (CONFIG_HDSL0_CHANNEL0 == 1)
PRUICSS_resetCore(gPruIcss0Handle, PRUICSS_RTU_PRU1);
#endif
#if (CONFIG_HDSL0_CHANNEL1 == 1)
PRUICSS_resetCore(gPruIcss0Handle, PRUICSS_PRU1);
#endif
#if (CONFIG_HDSL0_CHANNEL0 == 1)
PRUICSS_enableCore(gPruIcss0Handle, PRUICSS_RTU_PRU1); PRUICSS_enableCore(gPruIcss0Handle, PRUICSS_RTU_PRU1);
#endif
#if (CONFIG_HDSL0_CHANNEL1 == 1)
PRUICSS_enableCore(gPruIcss0Handle, PRUICSS_PRU1); PRUICSS_enableCore(gPruIcss0Handle, PRUICSS_PRU1);
#endif #endif
#endif
} }
void hdsl_init(void) void hdsl_init(void)