From 0fb9cd68d1a238da6a64dcbaa4c47caea9625b76 Mon Sep 17 00:00:00 2001 From: Dhaval Khandla Date: Mon, 8 Jan 2024 19:09:04 +0530 Subject: [PATCH] am243x: hdsl: Update the linker to define alignment of copy table Fixes: PINDSW-5516 Signed-off-by: Dhaval Khandla --- .../am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd | 3 ++- .../am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd | 3 ++- .../am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd | 3 ++- .../am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd | 3 ++- .../am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd | 3 ++- .../am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd | 3 ++- 6 files changed, 12 insertions(+), 6 deletions(-) diff --git a/examples/position_sense/hdsl_diagnostic/multi_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/hdsl_diagnostic/multi_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd index 05f4194..e5f6c16 100644 --- a/examples/position_sense/hdsl_diagnostic/multi_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ b/examples/position_sense/hdsl_diagnostic/multi_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -110,7 +110,8 @@ SECTIONS As this array is typecasted into a structure with 32-bit variables, 32b alignment is required */ - .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2:{} align(32) > MSRAM + .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2 : {} align(32) > MSRAM + .rodata.Hiperface_DSL2_0_TX_PRU_2 : {} align(32) > MSRAM } /* diff --git a/examples/position_sense/hdsl_diagnostic/multi_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/hdsl_diagnostic/multi_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd index e049e56..54cf576 100644 --- a/examples/position_sense/hdsl_diagnostic/multi_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ b/examples/position_sense/hdsl_diagnostic/multi_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -110,7 +110,8 @@ SECTIONS As this array is typecasted into a structure with 32-bit variables, 32b alignment is required */ - .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2:{} align(32) > MSRAM + .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2 : {} align(32) > MSRAM + .rodata.Hiperface_DSL2_0_TX_PRU_2 : {} align(32) > MSRAM } /* diff --git a/examples/position_sense/hdsl_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/hdsl_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd index 05f4194..e5f6c16 100644 --- a/examples/position_sense/hdsl_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ b/examples/position_sense/hdsl_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -110,7 +110,8 @@ SECTIONS As this array is typecasted into a structure with 32-bit variables, 32b alignment is required */ - .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2:{} align(32) > MSRAM + .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2 : {} align(32) > MSRAM + .rodata.Hiperface_DSL2_0_TX_PRU_2 : {} align(32) > MSRAM } /* diff --git a/examples/position_sense/hdsl_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/hdsl_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd index c035cd5..e1a0fb4 100644 --- a/examples/position_sense/hdsl_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ b/examples/position_sense/hdsl_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -112,7 +112,8 @@ SECTIONS As this array is typecasted into a structure with 32-bit variables, 32b alignment is required */ - .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2:{} align(32) > MSRAM + .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2 : {} align(32) > MSRAM + .rodata.Hiperface_DSL2_0_TX_PRU_2 : {} align(32) > MSRAM } /* diff --git a/examples/position_sense/hdsl_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/hdsl_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd index 7e5f964..26ba074 100644 --- a/examples/position_sense/hdsl_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ b/examples/position_sense/hdsl_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -112,7 +112,8 @@ SECTIONS As this array is typecasted into a structure with 32-bit variables, 32b alignment is required */ - .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2:{} align(32) > MSRAM + .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2 : {} align(32) > MSRAM + .rodata.Hiperface_DSL2_0_TX_PRU_2 : {} align(32) > MSRAM } /* diff --git a/examples/position_sense/hdsl_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/hdsl_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd index c035cd5..e1a0fb4 100644 --- a/examples/position_sense/hdsl_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ b/examples/position_sense/hdsl_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -112,7 +112,8 @@ SECTIONS As this array is typecasted into a structure with 32-bit variables, 32b alignment is required */ - .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2:{} align(32) > MSRAM + .rodata.Hiperface_DSL_SYNC2_0_TX_PRU_2 : {} align(32) > MSRAM + .rodata.Hiperface_DSL2_0_TX_PRU_2 : {} align(32) > MSRAM } /*