246 lines
10 KiB
C
246 lines
10 KiB
C
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/*
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* Copyright (C) 2021-23 Texas Instruments Incorporated
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef ENDAT_INTERFACE_H_
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#define ENDAT_INTERFACE_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ========================================================================== */
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/* Macros */
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/* ========================================================================== */
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/** \brief 2.1 send position value */
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#define ENDAT_CMD_SEND_POSITION_VALUES (0x1C >> 1)
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/** \brief 2.1 select memory area */
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#define ENDAT_CMD_SEL_MEM_AREA (0x38 >> 1)
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/** \brief 2.1 receive paramter */
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#define ENDAT_CMD_RECEIVE_PARAMETERS (0x70 >> 1)
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/** \brief 2.1 send paramter */
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#define ENDAT_CMD_SEND_PARAMETERS (0x8C >> 1)
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/** \brief 2.1 receive reset */
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#define ENDAT_CMD_RECEIVE_RESET (0xA8 >> 1)
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/** \brief 2.1 send test values */
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#define ENDAT_CMD_SEND_TEST_VALUES (0x54 >> 1)
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/** \brief 2.1 receive test command */
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#define ENDAT_CMD_RECEIVE_TEST_COMMAND (0xC4 >> 1)
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/** \brief 2.2 send position value with addinfo(s) */
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#define ENDAT_CMD_SEND_POSVAL_WITH_DATA (0xE0 >> 1)
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/** \brief 2.2 send position value with addinfo(s) & select memory area */
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#define ENDAT_CMD_SEND_POSVAL_RECEIVE_MEMSEL (0x24 >> 1)
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/** \brief 2.2 send position value with addinfo(s) & receive parameter */
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#define ENDAT_CMD_SEND_POSVAL_RECEIVE_PARAM (0x6C >> 1)
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/** \brief 2.2 send position value with addinfo(s) & send parameter */
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#define ENDAT_CMD_SEND_POSVAL_SEND_PARAM (0x90 >> 1)
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/** \brief 2.2 send position value with addinfo(s) & receive test command */
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#define ENDAT_CMD_SEND_POSVAL_RECEIVE_TESTCMD (0xD8 >> 1)
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/** \brief 2.2 send position value with addinfo(s) & receive error reset */
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#define ENDAT_CMD_SEND_POSVAL_RECEIVE_ERR_RST (0xB4 >> 1)
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/** \brief 2.2 receive communication command */
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#define ENDAT_CMD_RECEIVE_COMMUNICATION_CMD (0x48 >> 1)
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/** \brief command has no command supplement */
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#define ENDAT_CMDTYP_NO_SUPPLEMENT 0x1
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/** \brief position command */
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#define ENDAT_CMDTYP_POSITION (0x1 << 1)
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/** \brief command belongs to EnDat 2.2 command set */
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#define ENDAT_CMDTYP_ENDAT22 (0x1 << 2)
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/** \brief 2.2 position command with additional info 1 */
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#define ENDAT_CMDTYP_HAS_ADDINFO1 (0x1 << 3)
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/** \brief 2.2 position command with additional info 2 */
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#define ENDAT_CMDTYP_HAS_ADDINFO2 (0x1 << 4)
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/** \brief position/data CRC status mask */
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#define ENDAT_CRC_DATA (0x1 << 0)
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/** \brief additional info 1/2 CRC status mask (if either one present) <br>
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if both present, indicates additional info 2 CRC status mask */
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#define ENDAT_CRC_ADDINFOX (0x1 << 1)
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/** \brief additional info 1 CRC status mask (if both present) */
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#define ENDAT_CRC_ADDINFO1 (0x1 << 2)
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/* ========================================================================== */
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/* Structures */
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/* ========================================================================== */
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/**
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* \brief Structure defining per channel CRC information
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*
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* \details Firmware per channel CRC information interface
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*/
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struct crc
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{
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volatile uint8_t status;
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/**< CRC status,
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bit0: 1 - position/data success, 0 - position/data failure <br>
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bit1: 1 - additional info1 success, 0 - additioanl info1 failure <br>
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bit2: 1 - additional info2 success, 0 - additioanl info2 failure */
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volatile uint8_t err_cnt_data;
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/**< CRC position/data error count (will wraparound after 255) */
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volatile uint8_t err_cnt_addinfox;
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/**< CRC additional info1/2 error count (will wraparound after 255) */
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volatile uint8_t err_cnt_addinfo1;
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/**< CRC additional info1 error count (will wraparound after 255) <br>
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applicable only when both additional info's are present */
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};
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/**
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* \brief Structure defining EnDat per channel interface
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*
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* \details Firmware per channel interface
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*/
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struct endat_pruss_ch_info
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{
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volatile uint32_t pos_word0;
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/**< Initial (<=32) position bits received including error bits */
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volatile uint32_t pos_word1;
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/**< position bits received after the initial 32 bits (if applicable) */
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volatile uint32_t pos_word2;
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/**< additional info 1/2 (will be additional info 2 if both present) */
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volatile uint32_t pos_word3;
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/**< additional info 1 (if both additional 1 & 2 present) */
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struct crc crc;
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/**< crc information */
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volatile uint8_t num_clk_pulse;
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/**< position bits excluding SB, error, CRC (updated upon initialization) */
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volatile uint8_t endat22_stat;
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/**< encoder command set type, 1 - 2.2 supported, 0 - 2.2 not supported */
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volatile uint16_t rx_clk_less;
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/**< receive clocks to be reduced to handle propagation delay (to be <br>
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updated by host, if applicable) */
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volatile uint32_t prop_delay;
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/**< automatically estimated propagation delay */
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volatile uint32_t resvd_int0;
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/**< reserved */
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};
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/**
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* \brief Structure defining EnDat command interface
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*
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* \details Firmware command interface
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*/
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struct endat_pruss_cmd
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{
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volatile uint32_t word0;
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/**< command, <br>
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[Byte 0] bit 7: 0(dummy), bit 6-1: command, bit 0: address bit 7 <br>
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[Byte 1] bit 7-1: address bit 6-0, bit 0: parameter bit 15 <br>
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[Byte 2] bit 7-0: parameter bit 14-7 <br>
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[Byte 2] bit 7-1: parameter bit 6-0, bit 0: 0(dummy) */
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volatile uint32_t word1;
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/**< command parameters, <br>
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[Byte 0] receive bits, includes SB & dummy (for additional info) for PRU <br>
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[Byte 1] transmit bit <br>
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[Byte 2] attributes, <br>
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bit0: 1 - no command supplement, 0 - command supplement present <br>
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bit1: 1 - position command, 0 - not position command <br>
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bit2: 1 - EnDat 2.2 command, 0 - EnDat 2.1 command <br>
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bit3: 1 - additional info1 present, 0 - no additional info1 <br>
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bit4: 1 - additional info2 present, 0 - no additional info2 <br>
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[Byte 3] 1 - block address selected, 0 - block address not selected */
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volatile uint32_t word2;
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/**< command supplement, <br>
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[Byte 0] address <br>
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[Byte 1] parameter MSByte <br>
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[Byte 2] parameter LSByte <br>
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[Byte 3] block address */
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};
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/**
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* \brief Structure defining EnDat configuration interface
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*
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* \details Firmware configuration interface
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*/
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struct endat_pruss_config
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{
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volatile uint8_t opmode;
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/**< operation mode selection: 0 - periodic trigger, 1 - host trigger */
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volatile uint8_t channel;
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/**< channel mask (1 << channel), 0 < channel < 3. This has to be <br>
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selected before running firmware. Once initialization is complete,<br>
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it will reflect the detected channels in the selected mask. <br>
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Multichannel can have upto 3 selected, while single channel only one */
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volatile uint8_t trigger;
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/**< command trigger. Set LSB to send cmd, will be cleared upon cmd <br>
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completion. Set/clear MSB to start/stop continuous clock mode. <br>
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To start continuous mode LSB also has to be set. Note that cmd <br>
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has to be setup before trigger */
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volatile uint8_t status;
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/**< initialization status: 1 - upon successful. Wait around 5 seconds <br>
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after firmware has started running to confirm status */
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};
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/**
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* \brief Structure defining EnDat interface
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*
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* \details Firmware config, command and channel interface
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*
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*/
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struct endat_pruss_xchg
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{
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struct endat_pruss_config config[3];
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/**< config interface */
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struct endat_pruss_cmd cmd[3];
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/**< command interface */
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struct endat_pruss_ch_info ch[3];
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/**< per channel interface */
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uint16_t endat_rx_clk_config;
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uint16_t endat_tx_clk_config;
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uint32_t endat_rx_clk_cnten;
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uint32_t endat_delay_125ns;
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uint32_t endat_delay_5us;
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uint32_t endat_delay_51us;
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uint32_t endat_delay_1ms;
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uint32_t endat_delay_2ms;
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uint32_t endat_delay_12ms;
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uint32_t endat_delay_50ms;
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uint32_t endat_delay_380ms;
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uint32_t endat_delay_900ms;
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volatile uint8_t endat_primary_core_mask;
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volatile uint8_t endat_ch0_syn_bit;
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volatile uint8_t endat_ch1_syn_bit;
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volatile uint8_t endat_ch2_syn_bit;
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uint32_t endat_ch0_rt;
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uint32_t endat_ch1_rt;
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uint32_t endat_ch2_rt;
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uint64_t icssg_clk;
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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